nxt6000_writereg
if ((result = nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, nominal_rate & 0xFF)) < 0)
return nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, (nominal_rate >> 8) & 0xFF);
return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x00 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x01 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x02 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x03 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
return nxt6000_writereg(state, OFDM_ITB_CTL, 0x00);
return nxt6000_writereg(state, OFDM_ITB_CTL, ITBINV);
if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x00 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0)
return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x00 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04));
if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x02 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0)
return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x01 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04));
nxt6000_writereg(state, RS_COR_SYNC_PARAM, SYNC_PARAM);
nxt6000_writereg(state, BER_CTRL, /*(1 << 2) | */ (0x01 << 1) | 0x01);
nxt6000_writereg(state, VIT_BERTIME_2, 0x00); // BER Timer = 0x000200 * 256 = 131072 bits
nxt6000_writereg(state, VIT_BERTIME_1, 0x02); //
nxt6000_writereg(state, VIT_BERTIME_0, 0x00); //
nxt6000_writereg(state, VIT_COR_INTEN, 0x98); // Enable BER interrupts
nxt6000_writereg(state, VIT_COR_CTL, 0x82); // Enable BER measurement
nxt6000_writereg(state, VIT_COR_CTL, VIT_COR_RESYNC | 0x02 );
nxt6000_writereg(state, OFDM_COR_CTL, (0x01 << 5) | (nxt6000_readreg(state, OFDM_COR_CTL) & 0x0F));
nxt6000_writereg(state, OFDM_COR_MODEGUARD, FORCEMODE8K | 0x02);
nxt6000_writereg(state, OFDM_AGC_CTL, AGCLAST | INITIAL_AGC_BW);
nxt6000_writereg(state, OFDM_ITB_FREQ_1, 0x06);
nxt6000_writereg(state, OFDM_ITB_FREQ_2, 0x31);
nxt6000_writereg(state, OFDM_CAS_CTL, (0x01 << 7) | (0x02 << 3) | 0x04);
nxt6000_writereg(state, CAS_FREQ, 0xBB); /* CHECKME */
nxt6000_writereg(state, OFDM_SYR_CTL, 1 << 2);
nxt6000_writereg(state, OFDM_PPM_CTL_1, PPM256);
nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, 0x49);
nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, 0x72);
nxt6000_writereg(state, ANALOG_CONTROL_0, 1 << 5);
nxt6000_writereg(state, EN_DMD_RACQ, (1 << 7) | (3 << 4) | 2);
nxt6000_writereg(state, DIAG_CONFIG, TB_SET);
nxt6000_writereg(state, SUB_DIAG_MODE_SEL, CLKINVERSION);
nxt6000_writereg(state, SUB_DIAG_MODE_SEL, 0);
nxt6000_writereg(state, TS_FORMAT, 0);
nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18 );
nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18); // Clear BER Done interrupts
return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x01);
return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x00);
nxt6000_writereg(state, OFDM_COR_CTL, val & ~COREACT);
nxt6000_writereg(state, OFDM_COR_CTL, val | COREACT);