ni_stc_readw
while ((ni_stc_readw(dev, NISTC_AI_STATUS1_REG) &
fe = ni_stc_readw(dev, NISTC_AI_STATUS1_REG) &
fe = ni_stc_readw(dev, NISTC_AI_STATUS1_REG) &
if ((ni_stc_readw(dev, NISTC_AI_STATUS1_REG) &
b_status, ni_stc_readw(dev, NISTC_AO_STATUS2_REG));
if (!(ni_stc_readw(dev, NISTC_AI_STATUS1_REG) &
if (!(ni_stc_readw(dev, NISTC_AI_STATUS1_REG) &
if (!(ni_stc_readw(dev, NISTC_AI_STATUS1_REG) &
if ((ni_stc_readw(dev, NISTC_STATUS2_REG) &
data[1] = ni_stc_readw(dev, NISTC_DIO_IN_REG);
status1 = ni_stc_readw(dev, NISTC_STATUS1_REG);
while ((status1 = ni_stc_readw(dev, NISTC_STATUS1_REG)) &
*data_in = ni_stc_readw(dev, NISTC_DIO_SERIAL_IN_REG);
if (ni_stc_readw(dev, NISTC_DIO_IN_REG) & NISTC_DIO_SDIN)
return ni_stc_readw(dev, stc_register);
val = ni_stc_readw(dev, reg) << 16;
val |= ni_stc_readw(dev, reg + 1);
a_status = ni_stc_readw(dev, NISTC_AI_STATUS1_REG);
b_status = ni_stc_readw(dev, NISTC_AO_STATUS1_REG);
if ((ni_stc_readw(dev, NISTC_AI_STATUS1_REG) &
ni_stc_readw(dev, NISTC_AI_STATUS1_REG));
b_status = ni_stc_readw(dev, NISTC_AO_STATUS1_REG);