nvmem_device_write
rc = nvmem_device_write(lpg->lpg_chan_sdam,
rc = nvmem_device_write(lpg->lpg_chan_sdam, SDAM_REG_PBS_SEQ_EN, 1, &val);
rc = nvmem_device_write(lpg->lpg_chan_sdam, SDAM_PBS_TRIG_CLR, 1, &val);
rc = nvmem_device_write(lpg->lpg_chan_sdam, SDAM_REG_PBS_SEQ_EN, 1, &val);
rc = nvmem_device_write(lpg->lpg_chan_sdam, SDAM_PBS_TRIG_SET, 1, &val);
return nvmem_device_write(chan->lpg->lpg_chan_sdam, addr, 1, &set_trig);
rc = nvmem_device_write(lpg->lut_sdam, addr, 1, &brightness);
rc = nvmem_device_write(lpg->lpg_chan_sdam, addr, 1, &brightness);
nvmem_device_write(lpg_chan_sdam, SDAM_PBS_SCRATCH_LUT_COUNTER_OFFSET + chan->sdam_offset, 1, &val);
nvmem_device_write(lpg_chan_sdam, SDAM_PATTERN_CONFIG_OFFSET + chan->sdam_offset, 1, &conf);
nvmem_device_write(lpg_chan_sdam, SDAM_END_INDEX_OFFSET + chan->sdam_offset, 1, &hi_idx);
nvmem_device_write(lpg_chan_sdam, SDAM_START_INDEX_OFFSET + chan->sdam_offset, 1, &lo_idx);
nvmem_device_write(lpg_chan_sdam, SDAM_REG_RAMP_STEP_DURATION, 1, &val);
nvmem_device_write(lpg_chan_sdam, SDAM_PAUSE_HI_MULTIPLIER_OFFSET + chan->sdam_offset, 1, &hi_pause);
nvmem_device_write(lpg_chan_sdam, SDAM_PAUSE_LO_MULTIPLIER_OFFSET + chan->sdam_offset, 1, &lo_pause);
ret = nvmem_device_write(nvmem->base_nvmem, nvmem->offset + offset,
EXPORT_SYMBOL_GPL(nvmem_device_write);
err = nvmem_device_write(nvmem, 0x00, count, buf);
err = nvmem_device_write(nvmem, 0x90, count, buf);
nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4,
nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4,
nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4,
nvmem_device_write(nvmem, RTC_SCRATCH_RESUME_REG * 4,
int nvmem_device_write(struct nvmem_device *nvmem, unsigned int offset,