drivers/gpu/drm/msm/adreno/adreno_gpu.c

1175

return nvmem_cell_read_variable_le_u32(dev, "speed_bin", speedbin);

drivers/gpu/drm/panfrost/panfrost_devfreq.c

99

ret = nvmem_cell_read_variable_le_u32(dev, "speed-bin", &val);

drivers/nvmem/core.c

1960

EXPORT_SYMBOL_GPL(nvmem_cell_read_variable_le_u32);

drivers/phy/mediatek/phy-mtk-pcie.c

142

ret = nvmem_cell_read_variable_le_u32(dev, efuse_id, &efuse->tx_pmos);

drivers/phy/mediatek/phy-mtk-pcie.c

147

ret = nvmem_cell_read_variable_le_u32(dev, efuse_id, &efuse->tx_nmos);

drivers/phy/mediatek/phy-mtk-pcie.c

152

ret = nvmem_cell_read_variable_le_u32(dev, efuse_id, &efuse->rx_data);

drivers/phy/mediatek/phy-mtk-pcie.c

177

ret = nvmem_cell_read_variable_le_u32(dev, "glb_intr",

drivers/phy/mediatek/phy-mtk-tphy.c

1271

ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);

drivers/phy/mediatek/phy-mtk-tphy.c

1289

ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);

drivers/phy/mediatek/phy-mtk-tphy.c

1295

ret = nvmem_cell_read_variable_le_u32(dev, "rx_imp", &instance->efuse_rx_imp);

drivers/phy/mediatek/phy-mtk-tphy.c

1301

ret = nvmem_cell_read_variable_le_u32(dev, "tx_imp", &instance->efuse_tx_imp);

drivers/pmdomain/qcom/cpr.c

1644

ret = nvmem_cell_read_variable_le_u32(dev, "cpr_fuse_revision", &cpr_rev);

drivers/pmdomain/qcom/cpr.c

809

ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->ring_osc, &data);

drivers/pmdomain/qcom/cpr.c

828

ret = nvmem_cell_read_variable_le_u32(drv->dev, init_v_efuse, &bits);

drivers/pmdomain/qcom/cpr.c

897

ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->quotient, &fuse->quot);

drivers/pmdomain/qcom/cpr.c

966

ret = nvmem_cell_read_variable_le_u32(drv->dev, quot_offset, &quot_diff);

drivers/thermal/qcom/tsens-v0_1.c

152

ret = nvmem_cell_read_variable_le_u32(priv->dev, "use_backup", &backup);

drivers/thermal/qcom/tsens-v2.c

156

ret = nvmem_cell_read_variable_le_u32(dev, name, &sensor->offset);

drivers/thermal/qcom/tsens-v2.c

196

ret = nvmem_cell_read_variable_le_u32(priv->dev, "mode", &mode);

drivers/thermal/qcom/tsens-v2.c

204

ret = nvmem_cell_read_variable_le_u32(priv->dev, "base0", &base0);

drivers/thermal/qcom/tsens-v2.c

208

ret = nvmem_cell_read_variable_le_u32(priv->dev, "base1", &base1);

drivers/thermal/qcom/tsens.c

100

ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &base1);

drivers/thermal/qcom/tsens.c

108

ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &base2);

drivers/thermal/qcom/tsens.c

118

ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &p1[i]);

drivers/thermal/qcom/tsens.c

127

ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &p2[i]);

drivers/thermal/qcom/tsens.c

88

ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &mode);

include/linux/nvmem-consumer.h

63

int nvmem_cell_read_variable_le_u32(struct device *dev, const char *cell_id,