drivers/gpu/drm/nouveau/include/nvkm/core/layout.h

47

NVKM_LAYOUT_INST(NVKM_ENGINE_NVENC , struct nvkm_nvenc , nvenc, 4)

drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h

14

int gm107_nvenc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvenc **);

drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h

15

int tu102_nvenc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvenc **);

drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h

4

#define nvkm_nvenc(p) container_of((p), struct nvkm_nvenc, engine)

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c

29

struct nvkm_nvenc *nvenc = nvkm_nvenc(engine);

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c

35

nvkm_nvenc = {

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c

42

enum nvkm_subdev_type type, int inst, struct nvkm_nvenc **pnvenc)

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c

44

struct nvkm_nvenc *nvenc;

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c

50

ret = nvkm_engine_ctor(&nvkm_nvenc, device, type, inst, true,

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/gm107.c

35

gm107_nvenc_nofw(struct nvkm_nvenc *nvenc, int ver,

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/gm107.c

49

struct nvkm_nvenc **pnvenc)

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h

12

int (*load)(struct nvkm_nvenc *, int ver,

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h

20

int, struct nvkm_nvenc **pnvenc);

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c

28

struct nvkm_nvenc **pnvenc)

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/nvenc.c

11

return container_of(engine, struct nvkm_nvenc, engine);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/nvenc.c

17

struct nvkm_nvenc *nvenc;