Symbol: nvkm_grctx
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c
159
nv40_gr_construct_general(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c
265
nv40_gr_construct_state3d(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c
370
nv40_gr_construct_state3d_2(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c
534
nv40_gr_construct_state3d_3(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c
549
nv40_gr_construct_shader(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c
596
nv40_grctx_generate(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c
663
nv40_grctx_generate(&(struct nvkm_grctx) {
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c
674
struct nvkm_grctx ctx = {
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h
104
_cp_set(struct nvkm_grctx *ctx, int flag, int state)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h
111
cp_pos(struct nvkm_grctx *ctx, int offset)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h
121
gr_def(struct nvkm_grctx *ctx, u32 reg, u32 val)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h
25
cp_out(struct nvkm_grctx *ctx, u32 inst)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h
37
cp_lsr(struct nvkm_grctx *ctx, u32 val)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h
43
cp_ctx(struct nvkm_grctx *ctx, u32 reg, u32 length)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h
59
cp_name(struct nvkm_grctx *ctx, int name)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h
79
_cp_bra(struct nvkm_grctx *ctx, u32 mod, int flag, int state, int name)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.h
97
_cp_wait(struct nvkm_grctx *ctx, int flag, int state)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1158
xf_emit(struct nvkm_grctx *ctx, int num, u32 val) {
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1169
static void nv50_gr_construct_gene_dispatch(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1170
static void nv50_gr_construct_gene_m2mf(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1171
static void nv50_gr_construct_gene_ccache(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1172
static void nv50_gr_construct_gene_unk10xx(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1173
static void nv50_gr_construct_gene_unk14xx(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1174
static void nv50_gr_construct_gene_zcull(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1175
static void nv50_gr_construct_gene_clipid(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1176
static void nv50_gr_construct_gene_unk24xx(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1177
static void nv50_gr_construct_gene_vfetch(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1178
static void nv50_gr_construct_gene_eng2d(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1179
static void nv50_gr_construct_gene_csched(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1180
static void nv50_gr_construct_gene_unk1cxx(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1181
static void nv50_gr_construct_gene_strmout(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1182
static void nv50_gr_construct_gene_unk34xx(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1183
static void nv50_gr_construct_gene_ropm1(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1184
static void nv50_gr_construct_gene_ropm2(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1185
static void nv50_gr_construct_gene_ropc(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1186
static void nv50_gr_construct_xfer_tp(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1189
nv50_gr_construct_xfer1(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1352
nv50_gr_construct_gene_dispatch(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1408
nv50_gr_construct_gene_m2mf(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1460
nv50_gr_construct_gene_ccache(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1528
nv50_gr_construct_gene_unk10xx(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1588
nv50_gr_construct_gene_unk34xx(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1613
nv50_gr_construct_gene_unk14xx(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
170
static void nv50_gr_construct_mmio(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
171
static void nv50_gr_construct_xfer1(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
172
static void nv50_gr_construct_xfer2(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1724
nv50_gr_construct_gene_zcull(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
177
nv50_grctx_generate(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1785
nv50_gr_construct_gene_clipid(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1805
nv50_gr_construct_gene_unk24xx(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
1888
nv50_gr_construct_gene_vfetch(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
2074
nv50_gr_construct_gene_eng2d(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
2136
nv50_gr_construct_gene_csched(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
2235
nv50_gr_construct_gene_unk1cxx(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
2331
nv50_gr_construct_gene_strmout(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
2373
nv50_gr_construct_gene_ropm1(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
2386
nv50_gr_construct_gene_ropm2(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
2412
nv50_gr_construct_gene_ropc(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
258
nv50_grctx_generate(&(struct nvkm_grctx) {
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
2647
nv50_gr_construct_xfer_unk84xx(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
269
struct nvkm_grctx ctx = {
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
2739
nv50_gr_construct_xfer_tprop(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
294
nv50_gr_construct_mmio_ddata(struct nvkm_grctx *ctx);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
297
nv50_gr_construct_mmio(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
3039
nv50_gr_construct_xfer_tex(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
3085
nv50_gr_construct_xfer_unk8cxx(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
3124
nv50_gr_construct_xfer_tp(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
3141
nv50_gr_construct_xfer_mpc(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
3273
nv50_gr_construct_xfer2(struct nvkm_grctx *ctx)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
785
dd_emit(struct nvkm_grctx *ctx, int num, u32 val) {
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c
795
nv50_gr_construct_mmio_ddata(struct nvkm_grctx *ctx)