drivers/gpu/drm/nouveau/include/nvkm/core/layout.h

2

NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FSP , struct nvkm_fsp , fsp)

drivers/gpu/drm/nouveau/include/nvkm/subdev/fsp.h

17

bool nvkm_fsp_verify_gsp_fmc(struct nvkm_fsp *, u32 hash_size, u32 pkey_size, u32 sig_size);

drivers/gpu/drm/nouveau/include/nvkm/subdev/fsp.h

18

int nvkm_fsp_boot_gsp_fmc(struct nvkm_fsp *, u64 args_addr, u32 rsvd_size, bool resume,

drivers/gpu/drm/nouveau/include/nvkm/subdev/fsp.h

21

int gh100_fsp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fsp **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/fsp.h

22

int gb100_fsp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fsp **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/fsp.h

23

int gb202_fsp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fsp **);

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c

16

nvkm_fsp_verify_gsp_fmc(struct nvkm_fsp *fsp, u32 hash_size, u32 pkey_size, u32 sig_size)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c

26

struct nvkm_fsp *fsp = nvkm_fsp(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c

34

struct nvkm_fsp *fsp = nvkm_fsp(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c

46

nvkm_fsp = {

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c

54

struct nvkm_fsp **pfsp)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c

56

struct nvkm_fsp *fsp;

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c

63

nvkm_subdev_ctor(&nvkm_fsp, device, type, inst, &fsp->subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c

8

nvkm_fsp_boot_gsp_fmc(struct nvkm_fsp *fsp, u64 args_addr, u32 rsvd_size, bool resume,

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gb100.c

21

enum nvkm_subdev_type type, int inst, struct nvkm_fsp **pfsp)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gb202.c

11

gb202_fsp_wait_secure_boot(struct nvkm_fsp *fsp)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gb202.c

42

enum nvkm_subdev_type type, int inst, struct nvkm_fsp **pfsp)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

105

gh100_fsp_wait(struct nvkm_fsp *fsp)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

120

gh100_fsp_send(struct nvkm_fsp *fsp, const u8 *packet, u32 packet_size)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

154

gh100_fsp_send_sync(struct nvkm_fsp *fsp, u8 nvdm_type, const u8 *packet, u32 packet_size)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

205

gh100_fsp_boot_gsp_fmc(struct nvkm_fsp *fsp, u64 args_addr, u32 rsvd_size, bool resume,

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

241

gh100_fsp_wait_secure_boot(struct nvkm_fsp *fsp)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

272

enum nvkm_subdev_type type, int inst, struct nvkm_fsp **pfsp)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

69

gh100_fsp_poll(struct nvkm_fsp *fsp)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c

84

gh100_fsp_recv(struct nvkm_fsp *fsp, u8 *packet, u32 max_packet_size)

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/priv.h

11

int (*wait_secure_boot)(struct nvkm_fsp *);

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/priv.h

18

int (*boot_gsp_fmc)(struct nvkm_fsp *, u64 args_addr, u32 rsvd_size, bool resume,

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/priv.h

24

struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fsp **);

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/priv.h

26

int gh100_fsp_wait_secure_boot(struct nvkm_fsp *);

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/priv.h

27

int gh100_fsp_boot_gsp_fmc(struct nvkm_fsp *, u64 args_addr, u32 rsvd_size, bool resume,

drivers/gpu/drm/nouveau/nvkm/subdev/fsp/priv.h

7

#define nvkm_fsp(p) container_of((p), struct nvkm_fsp, subdev)

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gh100.c

267

struct nvkm_fsp *fsp = device->fsp;