nvkm_falcon_mask
nvkm_falcon_mask(falcon, 0x624, 0x00000080, 0x00000080);
nvkm_falcon_mask(falcon, 0x600, 0x00010007, (0 << 16) | (1 << 2) | 1);
nvkm_falcon_mask(falcon, 0x040, 0x00000000, 0x00000000);
nvkm_falcon_mask(falcon, 0x604, 0x00000007, 0x00000000); /* DMAIDX_VIRT */
nvkm_falcon_mask(falcon, 0x090, 0x00010000, 0x00010000);
nvkm_falcon_mask(falcon, 0x0a4, 0x00000008, 0x00000008);
nvkm_falcon_mask(falcon, 0x040, 0x00000000, 0x00000000);
nvkm_falcon_mask(falcon, 0x048, 0x00000003, 0x00000000);
nvkm_falcon_mask(falcon, 0x004, 0xffffffff, irqsclr);
nvkm_falcon_mask(falcon, 0x048, 0x00000001, 0x00000001);
nvkm_falcon_mask(falcon, 0x004, 0x00000008, 0x00000008);
nvkm_falcon_mask(falcon, 0x058, 0x00000002, 0x00000002);
nvkm_falcon_mask(falcon, 0x624, 0x00000080, 0x00000080);
nvkm_falcon_mask(falcon, 0x3c0, 0x00000001, 0x00000001);
nvkm_falcon_mask(falcon, 0x3c0, 0x00000001, 0x00000000);
nvkm_falcon_mask(&gsp->falcon, 0x1668, 0x00000111, 0x00000111);
nvkm_falcon_mask(&gsp->falcon, 0x624, 0x00000080, 0x00000080);
nvkm_falcon_mask(fw->falcon, 0x600 + desc.ctx_dma * 4, 0x00000007, 0x00000005);
nvkm_falcon_mask(falcon, 0x090, 0x00010000, 0x00010000);