drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

132

struct nvkm_falcon *falcon;

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

139

bool bl, const void *src, u32 len, struct nvkm_falcon *,

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

143

struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

145

struct nvkm_subdev *, const char *img, int ver, struct nvkm_falcon *,

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

151

int nvkm_falcon_fw_oneinit(struct nvkm_falcon_fw *, struct nvkm_falcon *, struct nvkm_vmm *,

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

191

int nvkm_falcon_qmgr_new(struct nvkm_falcon *, struct nvkm_falcon_qmgr **);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

28

void (*wr_init)(struct nvkm_falcon *, u8 port, bool sec, u32 mem_base);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

29

void (*wr)(struct nvkm_falcon *, u8 port, const u8 *img, int len, u16 tag);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

30

void (*rd_init)(struct nvkm_falcon *, u8 port, u32 mem_base);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

31

void (*rd)(struct nvkm_falcon *, u8 port, const u8 *img, int len);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

35

int (*init)(struct nvkm_falcon *, u64 dma_addr, int xfer_len,

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

37

void (*xfer)(struct nvkm_falcon *, u32 mem_base, u32 dma_base, u32 cmd);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

38

bool (*done)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

42

const char *name, u32 addr, struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

43

void nvkm_falcon_dtor(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

44

int nvkm_falcon_reset(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

45

int nvkm_falcon_pio_wr(struct nvkm_falcon *, const u8 *img, u32 img_base, u8 port,

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

47

int nvkm_falcon_pio_rd(struct nvkm_falcon *, u8 port, enum nvkm_falcon_mem type, u32 mem_base,

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

49

int nvkm_falcon_dma_wr(struct nvkm_falcon *, const u8 *img, u64 dma_addr, u32 dma_base,

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

51

bool nvkm_falcon_riscv_active(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

52

void nvkm_falcon_intr_retrigger(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

54

int gm200_flcn_reset_wait_mem_scrubbing(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

55

int gm200_flcn_disable(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

56

int gm200_flcn_enable(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

57

void gm200_flcn_bind_inst(struct nvkm_falcon *, int, u64);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

58

int gm200_flcn_bind_stat(struct nvkm_falcon *, bool);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

61

void gm200_flcn_tracepc(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

63

int gp102_flcn_reset_eng(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

66

bool tu102_flcn_riscv_active(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

68

void ga100_flcn_intr_retrigger(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

70

int ga102_flcn_select(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

71

int ga102_flcn_reset_prep(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

72

int ga102_flcn_reset_wait_mem_scrubbing(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

74

bool ga102_flcn_riscv_active(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

76

void nvkm_falcon_v1_load_imem(struct nvkm_falcon *,

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

78

void nvkm_falcon_v1_load_dmem(struct nvkm_falcon *, void *, u32, u32, u8);

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

79

void nvkm_falcon_v1_start(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

102

void (*init)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

103

void (*intr)(struct nvkm_falcon *, struct nvkm_chan *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

105

void (*load_imem)(struct nvkm_falcon *, void *, u32, u32, u16, u8, bool);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

106

void (*load_dmem)(struct nvkm_falcon *, void *, u32, u32, u8);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

107

void (*start)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

113

nvkm_falcon_rd32(struct nvkm_falcon *falcon, u32 addr)

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

119

nvkm_falcon_wr32(struct nvkm_falcon *falcon, u32 addr, u32 data)

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

125

nvkm_falcon_mask(struct nvkm_falcon *falcon, u32 addr, u32 mask, u32 val)

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

132

void nvkm_falcon_load_imem(struct nvkm_falcon *, void *, u32, u32, u16, u8,

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

134

void nvkm_falcon_load_dmem(struct nvkm_falcon *, void *, u32, u32, u8);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

135

void nvkm_falcon_start(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

4

#define nvkm_falcon(p) container_of((p), struct nvkm_falcon, engine)

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

54

int nvkm_falcon_get(struct nvkm_falcon *, struct nvkm_subdev *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

55

void nvkm_falcon_put(struct nvkm_falcon *, struct nvkm_subdev *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

61

int (*disable)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

62

int (*enable)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

63

int (*select)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

67

int (*reset_eng)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

68

int (*reset_prep)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

69

int (*reset_wait_mem_scrubbing)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

72

void (*bind_inst)(struct nvkm_falcon *, int target, u64 addr);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

73

int (*bind_stat)(struct nvkm_falcon *, bool intr);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

91

bool (*riscv_active)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

92

void (*intr_retrigger)(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/include/nvkm/engine/nvdec.h

11

struct nvkm_falcon falcon;

drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h

11

struct nvkm_falcon falcon;

drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h

11

struct nvkm_falcon falcon;

drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h

126

int (*bootstrap_falcon)(struct nvkm_falcon *, enum nvkm_acr_lsf_id);

drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h

127

int (*bootstrap_multiple_falcons)(struct nvkm_falcon *, u32 mask);

drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h

131

nvkm_acr_lsfw_load_sig_image_desc(struct nvkm_subdev *, struct nvkm_falcon *,

drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h

135

nvkm_acr_lsfw_load_sig_image_desc_v1(struct nvkm_subdev *, struct nvkm_falcon *,

drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h

140

nvkm_acr_lsfw_load_sig_image_desc_v2(struct nvkm_subdev *, struct nvkm_falcon *,

drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h

145

nvkm_acr_lsfw_load_bl_inst_data_sig(struct nvkm_subdev *, struct nvkm_falcon *,

drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h

150

nvkm_acr_lsfw_load_bl_sig_net(struct nvkm_subdev *, struct nvkm_falcon *,

drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h

74

struct nvkm_falcon *falcon;

drivers/gpu/drm/nouveau/include/nvkm/subdev/fsp.h

14

struct nvkm_falcon falcon;

drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h

68

struct nvkm_falcon falcon;

drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h

10

struct nvkm_falcon falcon;

drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c

30

gf100_ce_init(struct nvkm_falcon *ce)

drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c

43

gt215_ce_intr(struct nvkm_falcon *ce, struct nvkm_chan *chan)

drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h

9

void gt215_ce_intr(struct nvkm_falcon *, struct nvkm_chan *);

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

131

struct nvkm_falcon *falcon = nvkm_falcon(engine);

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

162

struct nvkm_falcon *falcon = nvkm_falcon(engine);

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

32

struct nvkm_falcon *falcon = nvkm_falcon(oclass->engine);

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

323

return nvkm_falcon(engine);

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

327

nvkm_falcon = {

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

342

struct nvkm_falcon *falcon;

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

354

return nvkm_engine_ctor(&nvkm_falcon, device, type, inst, enable, &falcon->engine);

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

61

struct nvkm_falcon *falcon = nvkm_falcon(engine);

drivers/gpu/drm/nouveau/nvkm/engine/falcon.c

98

struct nvkm_falcon *falcon = nvkm_falcon(engine);

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

1700

gf100_gr_init_fw(struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h

70

struct nvkm_falcon falcon;

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h

79

struct nvkm_falcon falcon;

drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c

29

g98_mspdec_init(struct nvkm_falcon *mspdec)

drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c

29

gf100_mspdec_init(struct nvkm_falcon *mspdec)

drivers/gpu/drm/nouveau/nvkm/engine/mspdec/priv.h

11

void gf100_mspdec_init(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/nvkm/engine/mspdec/priv.h

9

void g98_mspdec_init(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c

29

g98_msppp_init(struct nvkm_falcon *msppp)

drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c

29

gf100_msppp_init(struct nvkm_falcon *msppp)

drivers/gpu/drm/nouveau/nvkm/engine/msppp/priv.h

9

void g98_msppp_init(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c

29

g98_msvld_init(struct nvkm_falcon *msvld)

drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c

29

gf100_msvld_init(struct nvkm_falcon *msvld)

drivers/gpu/drm/nouveau/nvkm/engine/msvld/priv.h

11

void gf100_msvld_init(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/nvkm/engine/msvld/priv.h

9

void g98_msvld_init(struct nvkm_falcon *);

drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c

43

g98_sec_intr(struct nvkm_falcon *sec, struct nvkm_chan *chan)

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

44

struct nvkm_falcon *falcon = &sec2->falcon;

drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c

79

struct nvkm_falcon *falcon = &sec2->falcon;

drivers/gpu/drm/nouveau/nvkm/engine/sec2/ga102.c

63

struct nvkm_falcon *falcon = &sec2->falcon;

drivers/gpu/drm/nouveau/nvkm/engine/sec2/ga102.c

93

ga102_sec2_acr_bootstrap_falcon(struct nvkm_falcon *falcon, enum nvkm_acr_lsf_id id)

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

157

struct nvkm_falcon *falcon = &sec2->falcon;

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c

59

gp102_sec2_acr_bootstrap_falcon(struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

121

nvkm_falcon_pio(struct nvkm_falcon *falcon, enum nvkm_falcon_mem *mem_type, u32 *mem_base)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

140

nvkm_falcon_pio_rd(struct nvkm_falcon *falcon, u8 port, enum nvkm_falcon_mem mem_type, u32 mem_base,

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

175

nvkm_falcon_pio_wr(struct nvkm_falcon *falcon, const u8 *img, u32 img_base, u8 port,

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

212

nvkm_falcon_load_imem(struct nvkm_falcon *falcon, void *data, u32 start,

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

226

nvkm_falcon_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start,

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

237

nvkm_falcon_start(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

243

nvkm_falcon_reset(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

255

nvkm_falcon_oneinit(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

286

nvkm_falcon_put(struct nvkm_falcon *falcon, struct nvkm_subdev *user)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

29

nvkm_falcon_intr_retrigger(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

300

nvkm_falcon_get(struct nvkm_falcon *falcon, struct nvkm_subdev *user)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

321

nvkm_falcon_dtor(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

328

struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

36

nvkm_falcon_riscv_active(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

45

nvkm_falcon_dma(struct nvkm_falcon *falcon, enum nvkm_falcon_mem *mem_type, u32 *mem_base)

drivers/gpu/drm/nouveau/nvkm/falcon/base.c

56

nvkm_falcon_dma_wr(struct nvkm_falcon *falcon, const u8 *img, u64 dma_addr, u32 dma_base,

drivers/gpu/drm/nouveau/nvkm/falcon/cmdq.c

53

struct nvkm_falcon *falcon = cmdq->qmgr->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/cmdq.c

73

struct nvkm_falcon *falcon = cmdq->qmgr->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/fw.c

127

nvkm_falcon_fw_oneinit(struct nvkm_falcon_fw *fw, struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/falcon/fw.c

200

struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)

drivers/gpu/drm/nouveau/nvkm/falcon/fw.c

217

struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)

drivers/gpu/drm/nouveau/nvkm/falcon/fw.c

310

struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)

drivers/gpu/drm/nouveau/nvkm/falcon/fw.c

33

struct nvkm_falcon *falcon = fw->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/fw.c

77

struct nvkm_falcon *falcon = fw->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/ga100.c

25

ga100_flcn_intr_retrigger(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/ga100.c

33

struct nvkm_falcon *falcon = fw->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

115

struct nvkm_falcon *falcon = fw->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

128

struct nvkm_falcon *falcon = fw->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

28

ga102_flcn_riscv_active(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

34

ga102_flcn_dma_done(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

40

ga102_flcn_dma_xfer(struct nvkm_falcon *falcon, u32 mem_base, u32 dma_base, u32 cmd)

drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

48

ga102_flcn_dma_init(struct nvkm_falcon *falcon, u64 dma_addr, int xfer_len,

drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

70

ga102_flcn_reset_wait_mem_scrubbing(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

84

ga102_flcn_reset_prep(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

98

ga102_flcn_select(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

104

gm200_flcn_pio_imem_wr(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len, u16 tag)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

123

gm200_flcn_bind_stat(struct nvkm_falcon *falcon, bool intr)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

132

gm200_flcn_bind_inst(struct nvkm_falcon *falcon, int target, u64 addr)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

141

gm200_flcn_reset_wait_mem_scrubbing(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

155

gm200_flcn_enable(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

184

gm200_flcn_disable(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

220

struct nvkm_falcon *falcon = fw->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

251

struct nvkm_falcon *falcon = fw->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

29

gm200_flcn_tracepc(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

326

struct nvkm_falcon *falcon = fw->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

44

gm200_flcn_pio_dmem_rd(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

64

gm200_flcn_pio_dmem_rd_init(struct nvkm_falcon *falcon, u8 port, u32 dmem_base)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

70

gm200_flcn_pio_dmem_wr(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len, u16 tag)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

82

gm200_flcn_pio_dmem_wr_init(struct nvkm_falcon *falcon, u8 port, bool sec, u32 dmem_base)

drivers/gpu/drm/nouveau/nvkm/falcon/gm200.c

98

gm200_flcn_pio_imem_wr_init(struct nvkm_falcon *falcon, u8 port, bool sec, u32 imem_base)

drivers/gpu/drm/nouveau/nvkm/falcon/gp102.c

25

gp102_flcn_pio_emem_rd(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len)

drivers/gpu/drm/nouveau/nvkm/falcon/gp102.c

35

gp102_flcn_pio_emem_rd_init(struct nvkm_falcon *falcon, u8 port, u32 dmem_base)

drivers/gpu/drm/nouveau/nvkm/falcon/gp102.c

41

gp102_flcn_pio_emem_wr(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len, u16 tag)

drivers/gpu/drm/nouveau/nvkm/falcon/gp102.c

51

gp102_flcn_pio_emem_wr_init(struct nvkm_falcon *falcon, u8 port, bool sec, u32 emem_base)

drivers/gpu/drm/nouveau/nvkm/falcon/gp102.c

67

gp102_flcn_reset_eng(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c

157

struct nvkm_falcon *falcon = msgq->qmgr->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c

35

struct nvkm_falcon *falcon = msgq->qmgr->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c

54

struct nvkm_falcon *falcon = msgq->qmgr->falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/priv.h

7

nvkm_falcon_enable(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.c

70

nvkm_falcon_qmgr_new(struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.h

45

struct nvkm_falcon *falcon;

drivers/gpu/drm/nouveau/nvkm/falcon/tu102.c

25

tu102_flcn_riscv_active(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/falcon/v1.c

29

nvkm_falcon_v1_load_imem(struct nvkm_falcon *falcon, void *data, u32 start,

drivers/gpu/drm/nouveau/nvkm/falcon/v1.c

68

nvkm_falcon_v1_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start,

drivers/gpu/drm/nouveau/nvkm/falcon/v1.c

93

nvkm_falcon_v1_start(struct nvkm_falcon *falcon)

drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c

222

struct nvkm_falcon *falcon;

drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c

142

struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c

162

struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c

182

struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c

250

struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c

326

struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c

60

struct nvkm_falcon *falcon, enum nvkm_acr_lsf_id id)

drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c

88

struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h

108

struct nvkm_falcon *falcon;

drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h

114

struct nvkm_acr *, struct nvkm_falcon *,

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c

43

struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c

97

struct nvkm_falcon *falcon = fw->falcon;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gh100.c

22

struct nvkm_falcon *falcon = &gsp->falcon;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h

51

struct nvkm_falcon *, struct nvkm_falcon_fw *);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h

73

struct nvkm_falcon *, struct nvkm_falcon_fw *);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h

85

struct nvkm_falcon *, struct nvkm_falcon_fw *);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c

78

struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw)

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

107

struct nvkm_falcon *falcon = &pmu->base.falcon;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

172

struct nvkm_falcon *falcon = &pmu->falcon;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

98

struct nvkm_falcon *falcon = &pmu->base.falcon;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm200.c

27

gm200_pmu_flcn_bind_stat(struct nvkm_falcon *falcon, bool intr)

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm200.c

34

gm200_pmu_flcn_bind_inst(struct nvkm_falcon *falcon, int target, u64 addr)

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c

217

struct nvkm_falcon *falcon = &pmu->falcon;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c

39

gm20b_pmu_acr_bootstrap_falcon(struct nvkm_falcon *falcon,

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c

38

gp10b_pmu_acr_bootstrap_multiple_falcons(struct nvkm_falcon *falcon, u32 mask)

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h

49

void gm200_pmu_flcn_bind_inst(struct nvkm_falcon *, int, u64);

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h

54

int gm20b_pmu_acr_bootstrap_falcon(struct nvkm_falcon *, enum nvkm_acr_lsf_id);