drivers/gpu/drm/nouveau/include/nvkm/engine/dma.h

24

struct nvkm_dmaobj *nvkm_dmaobj_search(struct nvkm_client *, u64 object);

drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c

37

struct nvkm_dmaobj *dmaobj = NULL;

drivers/gpu/drm/nouveau/nvkm/engine/dma/priv.h

17

void *data, u32 size, struct nvkm_dmaobj **);

drivers/gpu/drm/nouveau/nvkm/engine/dma/priv.h

8

int (*bind)(struct nvkm_dmaobj *, struct nvkm_gpuobj *, int align,

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c

34

struct nvkm_dmaobj *

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c

43

return nvkm_dmaobj(object);

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c

50

struct nvkm_dmaobj *dmaobj = nvkm_dmaobj(base);

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c

57

return nvkm_dmaobj(base);

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c

69

struct nvkm_dmaobj *dmaobj)

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h

12

struct nvkm_dmaobj **);

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h

14

struct nvkm_dmaobj **);

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h

16

struct nvkm_dmaobj **);

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h

18

struct nvkm_dmaobj **);

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h

20

struct nvkm_dmaobj **);

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h

4

#define nvkm_dmaobj(p) container_of((p), struct nvkm_dmaobj, object)

drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h

9

struct nvkm_dmaobj *);

drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c

35

struct nvkm_dmaobj base;

drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c

41

gf100_dmaobj_bind(struct nvkm_dmaobj *base, struct nvkm_gpuobj *parent,

drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c

71

void *data, u32 size, struct nvkm_dmaobj **pdmaobj)

drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c

35

struct nvkm_dmaobj base;

drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c

40

gf119_dmaobj_bind(struct nvkm_dmaobj *base, struct nvkm_gpuobj *parent,

drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c

69

void *data, u32 size, struct nvkm_dmaobj **pdmaobj)

drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.c

33

struct nvkm_dmaobj base;

drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.c

38

gv100_dmaobj_bind(struct nvkm_dmaobj *base, struct nvkm_gpuobj *parent,

drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.c

68

void *data, u32 size, struct nvkm_dmaobj **pdmaobj)

drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c

34

struct nvkm_dmaobj base;

drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c

41

nv04_dmaobj_bind(struct nvkm_dmaobj *base, struct nvkm_gpuobj *parent,

drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.c

82

void *data, u32 size, struct nvkm_dmaobj **pdmaobj)

drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c

35

struct nvkm_dmaobj base;

drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c

41

nv50_dmaobj_bind(struct nvkm_dmaobj *base, struct nvkm_gpuobj *parent,

drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c

71

void *data, u32 size, struct nvkm_dmaobj **pdmaobj)

drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c

347

struct nvkm_dmaobj *dmaobj, u64 offset, u64 length,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h

5

struct nvkm_dmaobj;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h

57

const char *name, bool priv, u32 devm, struct nvkm_vmm *, struct nvkm_dmaobj *,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c

336

struct nvkm_dmaobj *ctxdma = NULL;