drivers/gpu/drm/nouveau/dispnv04/crtc.c

122

struct nvkm_clk *clk = nvxx_clk(drm);

drivers/gpu/drm/nouveau/dispnv04/hw.c

261

struct nvkm_clk *clk = nvxx_clk(drm);

drivers/gpu/drm/nouveau/dispnv04/hw.c

472

struct nvkm_clk *clk = nvxx_clk(drm);

drivers/gpu/drm/nouveau/include/nvkm/core/layout.h

28

NVKM_LAYOUT_ONCE(NVKM_SUBDEV_CLK , struct nvkm_clk , clk)

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

115

int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk,

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

117

int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

120

int nvkm_clk_read(struct nvkm_clk *, enum nv_clk_src);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

121

int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

122

int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

123

int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

124

int nvkm_clk_tstate(struct nvkm_clk *, u8 temperature);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

127

int nv04_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

128

int nv40_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

129

int nv50_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

130

int g84_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

131

int mcp77_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

132

int gt215_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

133

int gf100_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

134

int gk104_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

135

int gk20a_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

136

int gm20b_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

137

int gp10b_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

146

struct nvkm_clk *clk = ctrl->device->clk;

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

40

struct nvkm_clk *clk = ctrl->device->clk;

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

73

struct nvkm_clk *clk = ctrl->device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

112

nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

145

nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

160

nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

225

nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

267

nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

302

struct nvkm_clk *clk = container_of(work, typeof(*clk), work);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

336

nvkm_pstate_calc(struct nvkm_clk *clk, bool wait)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

346

nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

402

nvkm_pstate_new(struct nvkm_clk *clk, int idx)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

41

nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

473

nvkm_clk_ustate_update(struct nvkm_clk *clk, int req)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

497

nvkm_clk_nstate(struct nvkm_clk *clk, const char *mode, int arglen)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

521

nvkm_clk_ustate(struct nvkm_clk *clk, int req, int pwr)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

533

nvkm_clk_astate(struct nvkm_clk *clk, int req, int rel, bool wait)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

543

nvkm_clk_tstate(struct nvkm_clk *clk, u8 temp)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

552

nvkm_clk_dstate(struct nvkm_clk *clk, int req, int rel)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

574

nvkm_clk_read(struct nvkm_clk *clk, enum nv_clk_src src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

582

struct nvkm_clk *clk = nvkm_clk(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

592

struct nvkm_clk *clk = nvkm_clk(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

626

struct nvkm_clk *clk = nvkm_clk(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

641

nvkm_clk = {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

649

enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk *clk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

657

nvkm_subdev_ctor(&nvkm_clk, device, type, inst, subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

711

enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

79

nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/g84.c

45

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

158

gf100_clk_read(struct nvkm_clk *base, enum nv_clk_src src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

325

gf100_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

416

gf100_clk_prog(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

42

struct nvkm_clk base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

442

gf100_clk_tidy(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c

472

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

189

gk104_clk_read(struct nvkm_clk *base, enum nv_clk_src src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

339

gk104_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

42

struct nvkm_clk base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

448

gk104_clk_prog(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

479

gk104_clk_tidy(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c

508

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

461

gk20a_clk_read(struct nvkm_clk *base, enum nv_clk_src src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

481

gk20a_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

490

gk20a_clk_prog(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

503

gk20a_clk_tidy(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

544

gk20a_clk_fini(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

566

gk20a_clk_init(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

647

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

117

struct nvkm_clk base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

152

void gk20a_clk_fini(struct nvkm_clk *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

153

int gk20a_clk_read(struct nvkm_clk *, enum nv_clk_src);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

154

int gk20a_clk_calc(struct nvkm_clk *, struct nvkm_cstate *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

155

int gk20a_clk_prog(struct nvkm_clk *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.h

156

void gk20a_clk_tidy(struct nvkm_clk *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a_devfreq.c

187

struct nvkm_clk *base = nvkm_clk(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a_devfreq.c

212

struct nvkm_clk *base = nvkm_clk(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a_devfreq.c

261

int gk20a_devfreq_init(struct nvkm_clk *base, struct gk20a_devfreq **gdevfreq)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a_devfreq.c

79

struct nvkm_clk *base = nvkm_clk(subdev);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a_devfreq.h

10

int gk20a_devfreq_init(struct nvkm_clk *base, struct gk20a_devfreq **devfreq);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a_devfreq.h

15

static inline int gk20a_devfreq_init(struct nvkm_clk *base, struct gk20a_devfreq **devfreq)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

1020

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

465

gm20b_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

573

gm20b_clk_prog(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

721

gm20b_clk_fini(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

812

gm20b_clk_init(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.c

917

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

13

gp10b_clk_init(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

161

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

35

gp10b_clk_read(struct nvkm_clk *base, enum nv_clk_src src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

50

gp10b_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.c

61

gp10b_clk_prog(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gp10b.h

7

struct nvkm_clk base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

143

gt215_clk_read(struct nvkm_clk *base, enum nv_clk_src src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

187

gt215_clk_info(struct nvkm_clk *base, int idx, u32 khz,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

235

gt215_pll_info(struct nvkm_clk *base, int idx, u32 pll, u32 khz,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

307

gt215_clk_pre(struct nvkm_clk *clk, unsigned long *flags)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

342

gt215_clk_post(struct nvkm_clk *clk, unsigned long *flags)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

35

struct nvkm_clk base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

459

gt215_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

486

gt215_clk_prog(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

516

gt215_clk_tidy(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c

541

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.h

16

int gt215_pll_info(struct nvkm_clk *, int, u32, u32, struct gt215_clk_info *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.h

17

int gt215_clk_pre(struct nvkm_clk *, unsigned long *flags);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.h

18

void gt215_clk_post(struct nvkm_clk *, unsigned long *flags);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

200

mcp77_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

296

mcp77_clk_prog(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

33

struct nvkm_clk base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

391

mcp77_clk_tidy(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

413

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

81

mcp77_clk_read(struct nvkm_clk *base, enum nv_clk_src src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

32

nv04_clk_pll_calc(struct nvkm_clk *clock, struct nvbios_pll *info,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

49

nv04_clk_pll_prog(struct nvkm_clk *clk, u32 reg1, struct nvkm_pll_vals *pv)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

76

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

146

nv40_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

186

nv40_clk_prog(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

200

nv40_clk_tidy(struct nvkm_clk *obj)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

222

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

32

struct nvkm_clk base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

97

nv40_clk_read(struct nvkm_clk *base, enum nv_clk_src src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

192

nv50_clk_read(struct nvkm_clk *base, enum nv_clk_src src)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

369

nv50_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

496

nv50_clk_prog(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

503

nv50_clk_tidy(struct nvkm_clk *base)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

511

enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

560

struct nvkm_clk **pclk)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h

19

struct nvkm_clk base;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h

24

bool, struct nvkm_clk **);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h

25

int nv50_clk_read(struct nvkm_clk *, enum nv_clk_src);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h

26

int nv50_clk_calc(struct nvkm_clk *, struct nvkm_cstate *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h

27

int nv50_clk_prog(struct nvkm_clk *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h

28

void nv50_clk_tidy(struct nvkm_clk *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

10

int (*read)(struct nvkm_clk *, enum nv_clk_src);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

11

int (*calc)(struct nvkm_clk *, struct nvkm_cstate *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

12

int (*prog)(struct nvkm_clk *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

13

void (*tidy)(struct nvkm_clk *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

20

bool allow_reclock, struct nvkm_clk *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

22

bool allow_reclock, struct nvkm_clk **);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

24

int nv04_clk_pll_calc(struct nvkm_clk *, struct nvbios_pll *, int clk,

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

26

int nv04_clk_pll_prog(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

4

#define nvkm_clk(p) container_of((p), struct nvkm_clk, subdev)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

8

int (*init)(struct nvkm_clk *);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h

9

void (*fini)(struct nvkm_clk *);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c

133

struct nvkm_clk *clk = device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1115

struct nvkm_clk *clk = ram->base.fb->subdev.device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

161

struct nvkm_clk *clk = device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

122

struct nvkm_clk *clk = device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

53

struct nvkm_clk *clk = pmu->base.subdev.device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

61

struct nvkm_clk *clk = pmu->base.subdev.device->clk;

drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.c

71

struct nvkm_clk *clk = pmu->base.subdev.device->clk;