Symbol: nvkm_chan
drivers/gpu/drm/nouveau/include/nvkm/core/engine.h
36
int (*cclass)(struct nvkm_chan *, const struct nvkm_oclass *,
drivers/gpu/drm/nouveau/include/nvkm/core/engine.h
6
struct nvkm_chan;
drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h
103
void (*intr)(struct nvkm_falcon *, struct nvkm_chan *);
drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h
6
struct nvkm_chan;
drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
52
struct nvkm_chan *nvkm_chan_get_chid(struct nvkm_engine *, int id, unsigned long *irqflags);
drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
53
struct nvkm_chan *nvkm_chan_get_inst(struct nvkm_engine *, u64 inst, unsigned long *irqflags);
drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
54
void nvkm_chan_put(struct nvkm_chan **, unsigned long irqflags);
drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
56
struct nvkm_chan *nvkm_uchan_chan(struct nvkm_object *);
drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c
43
gt215_ce_intr(struct nvkm_falcon *ce, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h
9
void gt215_ce_intr(struct nvkm_falcon *, struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.c
84
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/falcon.c
68
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/cgrp.c
119
nvkm_cgrp_vctx_get(struct nvkm_cgrp *cgrp, struct nvkm_engn *engn, struct nvkm_chan *chan,
drivers/gpu/drm/nouveau/nvkm/engine/fifo/cgrp.c
52
struct nvkm_chan *chan, struct nvkm_client *client)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/cgrp.h
5
struct nvkm_chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/cgrp.h
61
int nvkm_cgrp_vctx_get(struct nvkm_cgrp *, struct nvkm_engn *, struct nvkm_chan *,
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
136
nvkm_chan_preempt_locked(struct nvkm_chan *chan, bool wait)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
149
nvkm_chan_preempt(struct nvkm_chan *chan, bool wait)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
163
nvkm_chan_remove_locked(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
182
nvkm_chan_remove(struct nvkm_chan *chan, bool preempt)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
195
nvkm_chan_insert(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
219
nvkm_chan_block_locked(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
227
nvkm_chan_error(struct nvkm_chan *chan, bool preempt)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
243
nvkm_chan_block(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
251
nvkm_chan_allow(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
261
nvkm_chan_del(struct nvkm_chan **pchan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
263
struct nvkm_chan *chan = *pchan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
295
nvkm_chan_put(struct nvkm_chan **pchan, unsigned long irqflags)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
297
struct nvkm_chan *chan = *pchan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
306
struct nvkm_chan *
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
312
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
327
struct nvkm_chan *
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
348
struct nvkm_memory *userd, u64 ouserd, struct nvkm_chan **pchan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
352
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
41
nvkm_chan_cctx_bind(struct nvkm_chan *chan, struct nvkm_engn *engn, struct nvkm_cctx *cctx)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
72
nvkm_chan_cctx_put(struct nvkm_chan *chan, struct nvkm_cctx **pcctx)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
92
nvkm_chan_cctx_get(struct nvkm_chan *chan, struct nvkm_engn *engn, struct nvkm_cctx **pcctx,
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
30
void (*clear)(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
41
int (*write)(struct nvkm_chan *, u64 offset, u64 length, u32 devm, bool priv);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
42
void (*clear)(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
48
void (*bind)(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
49
void (*unbind)(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
50
void (*start)(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
51
void (*stop)(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
52
void (*preempt)(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
53
u32 (*doorbell_handle)(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
59
struct nvkm_chan **);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
60
void nvkm_chan_del(struct nvkm_chan **);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
61
void nvkm_chan_allow(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
62
void nvkm_chan_block(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
63
void nvkm_chan_error(struct nvkm_chan *, bool preempt);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
64
void nvkm_chan_insert(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
65
void nvkm_chan_remove(struct nvkm_chan *, bool preempt);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
66
void nvkm_chan_remove_locked(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
67
int nvkm_chan_preempt(struct nvkm_chan *, bool wait);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
68
int nvkm_chan_preempt_locked(struct nvkm_chan *, bool wait);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
69
int nvkm_chan_cctx_get(struct nvkm_chan *, struct nvkm_engn *, struct nvkm_cctx **,
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
71
void nvkm_chan_cctx_put(struct nvkm_chan *, struct nvkm_cctx **);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h
72
void nvkm_chan_cctx_bind(struct nvkm_chan *, struct nvkm_engn *, struct nvkm_cctx *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
106
g84_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
35
g84_chan_bind(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
43
g84_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c
199
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c
238
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c
37
ga100_chan_doorbell_handle(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c
43
ga100_chan_stop(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c
51
ga100_chan_start(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c
62
ga100_chan_unbind(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.c
70
ga100_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gb202.c
11
gb202_chan_doorbell_handle(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
118
gf100_chan_userd_clear(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
161
gf100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
322
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
41
gf100_chan_preempt(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
419
gf100_runl_insert_chan(struct nvkm_chan *chan, struct nvkm_memory *memory, u64 offset)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
47
gf100_chan_stop(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
542
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
55
gf100_chan_start(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
65
gf100_chan_unbind(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
77
gf100_chan_bind(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
85
gf100_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
134
gk104_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
40
gk104_chan_stop(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
452
gk104_runl_insert_chan(struct nvkm_chan *chan, struct nvkm_memory *memory, u64 offset)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
48
gk104_chan_start(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
56
gk104_chan_unbind(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
64
gk104_chan_bind_inst(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
72
gk104_chan_bind(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
82
gk104_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.c
36
gk110_chan_preempt(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c
46
gm107_runl_insert_chan(struct nvkm_chan *chan, struct nvkm_memory *memory, u64 offset)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp100.c
33
gp100_runl_insert_chan(struct nvkm_chan *chan, struct nvkm_memory *memory, u64 offset)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c
116
gv100_ectx_ce_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c
149
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c
182
gv100_runl_insert_chan(struct nvkm_chan *chan, struct nvkm_memory *memory, u64 offset)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c
35
gv100_chan_doorbell_handle(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c
41
gv100_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c
91
gv100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
103
nv04_chan_ramfc_clear(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
116
nv04_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
181
nv04_eobj_ramht_del(struct nvkm_chan *chan, int hash)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
192
nv04_eobj_ramht_add(struct nvkm_engn *engn, struct nvkm_object *eobj, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
307
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
362
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
41
nv04_chan_stop(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
92
nv04_chan_start(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c
37
nv10_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c
38
nv17_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
111
nv40_eobj_ramht_add(struct nvkm_engn *engn, struct nvkm_object *eobj, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
125
nv40_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
39
nv40_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
150
nv50_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
248
nv50_runl_insert_chan(struct nvkm_chan *chan, struct nvkm_memory *memory, u64 offset)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
289
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
36
nv50_eobj_ramht_del(struct nvkm_chan *chan, int hash)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
42
nv50_eobj_ramht_add(struct nvkm_engn *engn, struct nvkm_object *eobj, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
48
nv50_chan_stop(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
56
nv50_chan_start(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
64
nv50_chan_unbind(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
72
nv50_chan_bind(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
80
nv50_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
100
void nv50_chan_preempt(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
101
int nv50_eobj_ramht_add(struct nvkm_engn *, struct nvkm_object *, struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
102
void nv50_eobj_ramht_del(struct nvkm_chan *, int);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
125
void gf100_chan_userd_clear(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
126
void gf100_chan_preempt(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
140
void gk104_runl_insert_chan(struct nvkm_chan *, struct nvkm_memory *, u64);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
158
void gk104_chan_bind(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
159
void gk104_chan_bind_inst(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
160
void gk104_chan_unbind(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
161
void gk104_chan_start(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
162
void gk104_chan_stop(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
169
void gk110_chan_preempt(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
187
void gv100_runl_insert_chan(struct nvkm_chan *, struct nvkm_memory *, u64);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
191
void gv100_ectx_bind(struct nvkm_engn *, struct nvkm_cctx *, struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
194
void gv100_ectx_ce_bind(struct nvkm_engn *, struct nvkm_cctx *, struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
200
u32 tu102_chan_doorbell_handle(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
213
u32 gb202_chan_doorbell_handle(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
81
void nv04_chan_ramfc_clear(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
82
void nv04_chan_start(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
83
void nv04_chan_stop(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
84
void nv04_eobj_ramht_del(struct nvkm_chan *, int);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
9
struct nvkm_chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
97
void nv50_chan_unbind(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
98
void nv50_chan_start(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
99
void nv50_chan_stop(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.c
182
struct nvkm_chan *
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.c
186
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.c
206
struct nvkm_chan *
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.c
210
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.c
37
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.c
62
struct nvkm_chan *chan, *ctmp;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.h
117
struct nvkm_chan *nvkm_runl_chan_get_chid(struct nvkm_runl *, int chid, unsigned long *irqflags);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.h
118
struct nvkm_chan *nvkm_runl_chan_get_inst(struct nvkm_runl *, u64 inst, unsigned long *irqflags);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.h
20
void (*bind)(struct nvkm_engn *, struct nvkm_cctx *, struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.h
21
int (*ctor2)(struct nvkm_engn *, struct nvkm_vctx *, struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.h
22
int (*ramht_add)(struct nvkm_engn *, struct nvkm_object *, struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.h
23
void (*ramht_del)(struct nvkm_chan *, int hash);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.h
52
void (*insert_chan)(struct nvkm_chan *, struct nvkm_memory *, u64 offset);
drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.h
6
struct nvkm_chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c
35
tu102_chan_doorbell_handle(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c
41
tu102_chan_start(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
101
struct nvkm_chan *chan = uobj->chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
157
struct nvkm_chan *chan = nvkm_uchan(oclass->parent)->chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
206
struct nvkm_chan *chan = nvkm_uchan(object)->chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
258
struct nvkm_chan *chan = nvkm_uchan(object)->chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
274
struct nvkm_chan *chan = nvkm_uchan(object)->chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
288
struct nvkm_chan *chan = nvkm_uchan(object)->chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
320
struct nvkm_chan *
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
339
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
38
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
44
struct nvkm_chan *chan = nvkm_uchan(object)->chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
69
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c
78
struct nvkm_chan *chan = uobj->chan;
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c
112
nvkm_gr_cclass_new(struct nvkm_chan *chan, const struct nvkm_oclass *oclass,
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
1612
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
377
gf100_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c
1184
nv04_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c
1002
nv10_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.h
12
int nv10_gr_chan_new(struct nvkm_gr *, struct nvkm_chan *,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c
185
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c
75
nv20_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c
21
nv25_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c
21
nv2a_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c
22
nv30_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c
21
nv34_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c
21
nv35_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c
148
nv40_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h
25
struct nvkm_chan *fifo;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h
30
int nv40_gr_chan_new(struct nvkm_gr *, struct nvkm_chan *,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c
625
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c
89
nv50_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.h
30
int nv50_gr_chan_new(struct nvkm_gr *, struct nvkm_chan *,
drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h
25
int (*chan_new)(struct nvkm_gr *, struct nvkm_chan *,
drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h
8
struct nvkm_chan;
drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c
84
nv31_mpeg_chan_new(struct nvkm_chan *fifoch, const struct nvkm_oclass *oclass,
drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.h
27
struct nvkm_chan *fifo;
drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.h
30
int nv31_mpeg_chan_new(struct nvkm_chan *, const struct nvkm_oclass *,
drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.c
103
nv44_mpeg_chan_new(struct nvkm_chan *fifoch, const struct nvkm_oclass *oclass,
drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.c
46
struct nvkm_chan *fifo;
drivers/gpu/drm/nouveau/nvkm/engine/mpeg/priv.h
5
struct nvkm_chan;
drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c
43
g98_sec_intr(struct nvkm_falcon *sec, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c
77
nvkm_sw_cclass_get(struct nvkm_chan *fifoch, const struct nvkm_oclass *oclass,
drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.c
77
struct nvkm_chan *fifo, const struct nvkm_oclass *oclass,
drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h
14
struct nvkm_chan *fifo;
drivers/gpu/drm/nouveau/nvkm/engine/sw/chan.h
27
struct nvkm_chan *, const struct nvkm_oclass *,
drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c
105
gf100_sw_chan_new(struct nvkm_sw *sw, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
109
nv04_sw_chan_new(struct nvkm_sw *sw, struct nvkm_chan *fifo,
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c
39
nv10_sw_chan_new(struct nvkm_sw *sw, struct nvkm_chan *fifo,
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c
102
nv50_sw_chan_new(struct nvkm_sw *sw, struct nvkm_chan *fifoch,
drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h
18
int (*chan_new)(struct nvkm_sw *, struct nvkm_chan *,
drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c
140
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/engine.c
90
struct nvkm_chan *chan = nvkm_uchan_chan(oclass->parent);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h
28
u32 (*doorbell_handle)(struct nvkm_chan *);
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gr.h
16
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
154
r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
256
r535_gr_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
277
r535_flcn_bind(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
299
r535_flcn_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx, struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
347
struct nvkm_chan *chan;
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
42
r535_chan_doorbell_handle(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
50
r535_chan_stop(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
55
r535_chan_start(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
60
r535_chan_ramfc_clear(struct nvkm_chan *chan)
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c
143
r535_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *chan, const struct nvkm_oclass *oclass,
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h
167
int r535_gr_chan_new(struct nvkm_gr *, struct nvkm_chan *, const struct nvkm_oclass *,