Symbol: nvkm_acr
drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
23
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_ACR , struct nvkm_acr , acr)
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
123
void (*bld_write)(struct nvkm_acr *, u32 bld, struct nvkm_acr_lsfw *);
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
124
void (*bld_patch)(struct nvkm_acr *, u32 bld, s64 adjust);
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
4
#define nvkm_acr(p) container_of((p), struct nvkm_acr, subdev)
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
63
int gm200_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **);
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
64
int gm20b_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **);
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
65
int gp102_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **);
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
66
int gp108_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **);
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
67
int gp10b_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **);
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
68
int gv100_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **);
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
69
int tu102_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **);
drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h
70
int ga102_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
438
void gm20b_gr_acr_bld_write(struct nvkm_acr *, u32, struct nvkm_acr_lsfw *);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
439
void gm20b_gr_acr_bld_patch(struct nvkm_acr *, u32, s64);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
443
void gp108_gr_acr_bld_write(struct nvkm_acr *, u32, struct nvkm_acr_lsfw *);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
444
void gp108_gr_acr_bld_patch(struct nvkm_acr *, u32, s64);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
46
gm200_gr_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
57
gm200_gr_acr_bld_write(struct nvkm_acr *acr, u32 bld,
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c
34
gm20b_gr_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c
52
gm20b_gr_acr_bld_write(struct nvkm_acr *acr, u32 bld,
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp108.c
29
gp108_gr_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp108.c
40
gp108_gr_acr_bld_write(struct nvkm_acr *acr, u32 bld,
drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c
241
gp102_sec2_acr_bld_patch_1(struct nvkm_acr *acr, u32 bld, s64 adjust)
drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c
252
gp102_sec2_acr_bld_write_1(struct nvkm_acr *acr, u32 bld,
drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c
78
gp102_sec2_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust)
drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c
90
gp102_sec2_acr_bld_write(struct nvkm_acr *acr, u32 bld,
drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h
33
void gp102_sec2_acr_bld_write_1(struct nvkm_acr *, u32, struct nvkm_acr_lsfw *);
drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h
34
void gp102_sec2_acr_bld_patch_1(struct nvkm_acr *, u32, s64);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
128
nvkm_acr_reload(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
137
struct nvkm_acr *acr = device->acr;
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
174
struct nvkm_acr *acr = device->acr;
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
190
nvkm_acr_unload(nvkm_acr(subdev));
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
197
struct nvkm_acr *acr = nvkm_acr(subdev);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
206
nvkm_acr_cleanup(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
218
struct nvkm_acr *acr = nvkm_acr(subdev);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
33
nvkm_acr_hsfw_find(struct nvkm_acr *acr, const char *name)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
362
struct nvkm_acr *acr = nvkm_acr(subdev);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
388
nvkm_acr = {
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
396
nvkm_acr_ctor_wpr(struct nvkm_acr *acr, int ver)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
420
enum nvkm_subdev_type type, int inst, struct nvkm_acr **pacr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
422
struct nvkm_acr *acr;
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
427
nvkm_subdev_ctor(&nvkm_acr, device, type, inst, &acr->subdev);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
46
nvkm_acr_hsfw_boot(struct nvkm_acr *acr, const char *name)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
60
nvkm_acr_rtos(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
75
nvkm_acr_unload(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.c
89
nvkm_acr_load(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga100.c
25
ga100_acr_wpr_check(struct nvkm_acr *acr, u64 *start, u64 *limit)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga100.c
35
ga100_acr_hsfw_ctor(struct nvkm_acr *acr, const char *bl, const char *fw,
drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.c
133
ga102_acr_wpr_build(struct nvkm_acr *acr, struct nvkm_acr_lsf *rtos)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.c
189
ga102_acr_wpr_layout(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.c
218
ga102_acr_wpr_parse(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.c
28
ga102_acr_wpr_patch(struct nvkm_acr *acr, s64 adjust)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.c
291
ga102_acr_load(struct nvkm_acr *acr, int version,
drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.c
324
struct nvkm_acr **pacr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.c
62
ga102_acr_wpr_build_lsb(struct nvkm_acr *acr, struct nvkm_acr_lsfw *lsfw)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
114
gm200_acr_wpr_build_lsb(struct nvkm_acr *acr, struct nvkm_acr_lsfw *lsfw)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
129
gm200_acr_wpr_build(struct nvkm_acr *acr, struct nvkm_acr_lsf *rtos)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
169
gm200_acr_wpr_alloc(struct nvkm_acr *acr, u32 wpr_size)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
183
gm200_acr_wpr_layout(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
209
gm200_acr_wpr_parse(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
245
gm200_acr_hsfw_ctor(struct nvkm_acr *acr, const char *bl, const char *fw, const char *name, int ver,
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
285
struct nvkm_acr *acr = fw->falcon->owner->device->acr;
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
343
gm200_acr_load(struct nvkm_acr *acr, int ver, const struct nvkm_acr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
371
struct nvkm_acr **pacr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
40
gm200_acr_nofw(struct nvkm_acr *acr, int ver, const struct nvkm_acr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
47
gm200_acr_init(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
53
gm200_acr_wpr_check(struct nvkm_acr *acr, u64 *start, u64 *limit)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.c
65
gm200_acr_wpr_patch(struct nvkm_acr *acr, s64 adjust)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.c
115
gm20b_acr_load(struct nvkm_acr *acr, int ver, const struct nvkm_acr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.c
137
struct nvkm_acr **pacr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.c
33
gm20b_acr_wpr_alloc(struct nvkm_acr *acr, u32 wpr_size)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.c
73
struct nvkm_acr *acr = fw->falcon->owner->device->acr;
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c
119
gp102_acr_wpr_alloc(struct nvkm_acr *acr, u32 wpr_size)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c
134
gp102_acr_wpr_layout(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c
163
gp102_acr_wpr_parse(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c
200
struct nvkm_acr *acr = fw->falcon->owner->device->acr;
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c
257
gp102_acr_load(struct nvkm_acr *acr, int ver, const struct nvkm_acr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c
285
struct nvkm_acr **pacr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c
33
gp102_acr_wpr_patch(struct nvkm_acr *acr, s64 adjust)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c
62
gp102_acr_wpr_build_lsb(struct nvkm_acr *acr, struct nvkm_acr_lsfw *lsfw)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.c
77
gp102_acr_wpr_build(struct nvkm_acr *acr, struct nvkm_acr_lsf *rtos)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp108.c
109
struct nvkm_acr **pacr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp10b.c
56
struct nvkm_acr **pacr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/gv100.c
64
struct nvkm_acr **pacr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c
255
struct nvkm_acr *acr = subdev->device->acr;
drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c
333
struct nvkm_acr *acr = subdev->device->acr;
drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c
39
nvkm_acr_lsfw_del_all(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c
48
nvkm_acr_lsfw_get(struct nvkm_acr *acr, enum nvkm_acr_lsf_id id)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c
59
nvkm_acr_lsfw_add(const struct nvkm_acr_lsf_func *func, struct nvkm_acr *acr,
drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c
94
struct nvkm_acr *acr = subdev->device->acr;
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
100
int ga100_acr_hsfw_ctor(struct nvkm_acr *, const char *, const char *, const char *, int,
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
104
int inst, struct nvkm_acr **);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
114
struct nvkm_acr *, struct nvkm_falcon *,
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
117
void nvkm_acr_lsfw_del_all(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
13
int gm200_acr_nofw(struct nvkm_acr *, int, const struct nvkm_acr_fwif *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
14
int gm20b_acr_load(struct nvkm_acr *, int, const struct nvkm_acr_fwif *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
15
int gp102_acr_load(struct nvkm_acr *, int, const struct nvkm_acr_fwif *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
23
int (*wpr_parse)(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
24
u32 (*wpr_layout)(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
25
int (*wpr_alloc)(struct nvkm_acr *, u32 wpr_size);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
26
int (*wpr_build)(struct nvkm_acr *, struct nvkm_acr_lsf *rtos);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
27
int (*wpr_patch)(struct nvkm_acr *, s64 adjust);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
28
void (*wpr_check)(struct nvkm_acr *, u64 *start, u64 *limit);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
29
int (*init)(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
30
void (*fini)(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
35
int gm200_acr_wpr_parse(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
36
u32 gm200_acr_wpr_layout(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
37
int gm200_acr_wpr_build(struct nvkm_acr *, struct nvkm_acr_lsf *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
38
int gm200_acr_wpr_patch(struct nvkm_acr *, s64);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
39
void gm200_acr_wpr_check(struct nvkm_acr *, u64 *, u64 *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
42
int gm200_acr_init(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
44
int gm20b_acr_wpr_alloc(struct nvkm_acr *, u32 wpr_size);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
46
int gp102_acr_wpr_parse(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
47
u32 gp102_acr_wpr_layout(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
48
int gp102_acr_wpr_alloc(struct nvkm_acr *, u32 wpr_size);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
49
int gp102_acr_wpr_build(struct nvkm_acr *, struct nvkm_acr_lsf *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
50
int gp102_acr_wpr_build_lsb(struct nvkm_acr *, struct nvkm_acr_lsfw *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
51
int gp102_acr_wpr_patch(struct nvkm_acr *, s64);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
53
int tu102_acr_init(struct nvkm_acr *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
55
void ga100_acr_wpr_check(struct nvkm_acr *, u64 *, u64 *);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
71
int nvkm_acr_hsfw_boot(struct nvkm_acr *, const char *name);
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
75
int (*load)(struct nvkm_acr *, const char *bl, const char *fw,
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
8
int (*load)(struct nvkm_acr *, int version,
drivers/gpu/drm/nouveau/nvkm/subdev/acr/priv.h
86
int gm200_acr_hsfw_ctor(struct nvkm_acr *, const char *, const char *, const char *, int,
drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.c
167
tu102_acr_load(struct nvkm_acr *acr, int version,
drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.c
202
struct nvkm_acr **pacr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.c
33
tu102_acr_init(struct nvkm_acr *acr)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.c
43
tu102_acr_wpr_build(struct nvkm_acr *acr, struct nvkm_acr_lsf *rtos)
drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.c
88
tu102_acr_hsfw_nofw(struct nvkm_acr *acr, const char *bl, const char *fw,
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c
66
gm20b_pmu_acr_bld_patch(struct nvkm_acr *acr, u32 bld, s64 adjust)
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c
87
gm20b_pmu_acr_bld_write(struct nvkm_acr *acr, u32 bld,
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h
52
void gm20b_pmu_acr_bld_patch(struct nvkm_acr *, u32, s64);
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h
53
void gm20b_pmu_acr_bld_write(struct nvkm_acr *, u32, struct nvkm_acr_lsfw *);