CN23XX_OQ_OFFSET

283

(CN23XX_SLI_OQ_PKT_CONTROL_START + ((oq) * CN23XX_OQ_OFFSET))

286

(CN23XX_SLI_OQ_BASE_ADDR_START64 + ((oq) * CN23XX_OQ_OFFSET))

289

(CN23XX_SLI_OQ_SIZE_START + ((oq) * CN23XX_OQ_OFFSET))

292

(CN23XX_SLI_OQ0_BUFF_INFO_SIZE + ((oq) * CN23XX_OQ_OFFSET))

295

(CN23XX_SLI_OQ_PKT_SENT_START + ((oq) * CN23XX_OQ_OFFSET))

298

(CN23XX_SLI_OQ_PKT_CREDITS_START + ((oq) * CN23XX_OQ_OFFSET))

302

((oq) * CN23XX_OQ_OFFSET))

307

((oq) * CN23XX_OQ_OFFSET))

311

((oq) * CN23XX_OQ_OFFSET) + 4)

2709

reg = 0x100c0 + i * CN23XX_OQ_OFFSET;