drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

1006

struct nv10_gr_chan *chan;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

1012

nvkm_object_ctor(&nv10_gr_chan, oclass, &chan->object);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

1097

struct nv10_gr_chan *chan;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

393

struct nv10_gr_chan *chan[32];

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

397

#define nv10_gr_chan(p) container_of((p), struct nv10_gr_chan, object)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

431

nv17_gr_mthd_lma_window(struct nv10_gr_chan *chan, u32 mthd, u32 data)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

504

nv17_gr_mthd_lma_enable(struct nv10_gr_chan *chan, u32 mthd, u32 data)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

516

nv17_gr_mthd_celcius(struct nv10_gr_chan *chan, u32 mthd, u32 data)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

518

void (*func)(struct nv10_gr_chan *, u32, u32);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

531

nv10_gr_mthd(struct nv10_gr_chan *chan, u8 class, u32 mthd, u32 data)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

533

bool (*func)(struct nv10_gr_chan *, u32, u32);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

546

static struct nv10_gr_chan *

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

550

struct nv10_gr_chan *chan = NULL;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

560

nv10_gr_save_pipe(struct nv10_gr_chan *chan)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

579

nv10_gr_load_pipe(struct nv10_gr_chan *chan)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

630

nv10_gr_create_pipe(struct nv10_gr_chan *chan)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

812

nv10_gr_load_dma_vtxbuf(struct nv10_gr_chan *chan, int chid, u32 inst)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

883

nv10_gr_load_context(struct nv10_gr_chan *chan, int chid)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

910

nv10_gr_unload_context(struct nv10_gr_chan *chan)

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

935

struct nv10_gr_chan *prev = NULL;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

936

struct nv10_gr_chan *next = NULL;

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

956

struct nv10_gr_chan *chan = nv10_gr_chan(object);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

973

struct nv10_gr_chan *chan = nv10_gr_chan(object);

drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

984

nv10_gr_chan = {