nv04_gr_set_ctx_val
nv04_gr_set_ctx_val(device, inst, 0, 0);
nv04_gr_set_ctx_val(device, inst, 0x02000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x02000000, 0x02000000);
nv04_gr_set_ctx_val(device, inst, 0x02000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x02000000, 0x02000000);
nv04_gr_set_ctx_val(device, inst, 0x02000000, 0x02000000);
nv04_gr_set_ctx_val(device, inst, 0x08000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x08000000, 0x08000000);
nv04_gr_set_ctx_val(device, inst, 0x08000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x08000000, 0x08000000);
nv04_gr_set_ctx_val(device, inst, 0x10000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x10000000, 0x10000000);
nv04_gr_set_ctx_val(device, inst, 0x20000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x20000000, 0x20000000);
nv04_gr_set_ctx_val(device, inst, 0x40000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x40000000, 0x40000000);
nv04_gr_set_ctx_val(device, inst, 0x02000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x02000000, 0x02000000);
nv04_gr_set_ctx_val(device, inst, 0x04000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x04000000, 0x04000000);
nv04_gr_set_ctx_val(device, inst, 0x02000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x02000000, 0x02000000);
nv04_gr_set_ctx_val(device, inst, 0x04000000, 0);
nv04_gr_set_ctx_val(device, inst, 0x04000000, 0x04000000);