drivers/gpu/drm/nouveau/dispnv04/dac.c

242

uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);

drivers/gpu/drm/nouveau/dispnv04/dac.c

385

uint32_t dac_offset = nv04_dac_output_offset(encoder);

drivers/gpu/drm/nouveau/dispnv04/dac.c

398

dac_offset = nv04_dac_output_offset(rebind);

drivers/gpu/drm/nouveau/dispnv04/dac.c

407

NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);

drivers/gpu/drm/nouveau/dispnv04/dac.c

409

NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);

drivers/gpu/drm/nouveau/dispnv04/dac.c

433

int dacclk_off = NV_PRAMDAC_DACCLK + nv04_dac_output_offset(encoder);

drivers/gpu/drm/nouveau/dispnv04/dac.c

482

nv04_dac_output_offset(encoder));

drivers/gpu/drm/nouveau/dispnv04/dac.c

491

NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + nv04_dac_output_offset(encoder),

drivers/gpu/drm/nouveau/dispnv04/dfp.c

469

NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

471

NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);

drivers/gpu/drm/nouveau/dispnv04/disp.h

110

int nv04_dac_output_offset(struct drm_encoder *encoder);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

413

nv04_dac_output_offset(encoder);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

51

uint32_t testval, regoffset = nv04_dac_output_offset(encoder);

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

599

nv04_dac_output_offset(encoder),

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

603

nv04_dac_output_offset(encoder),

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

621

nv04_dac_output_offset(encoder));

drivers/gpu/drm/nouveau/dispnv04/tvnv17.c

633

nv04_dac_output_offset(encoder),