arch/mips/include/asm/mips-cm.h

426

if (mips_cm_revision() >= CM_REV_CM3)

arch/mips/kernel/mips-cm.c

309

mips_cm_is64 = IS_ENABLED(CONFIG_64BIT) && (mips_cm_revision() >= CM_REV_CM3);

arch/mips/kernel/mips-cm.c

326

if (cm_rev >= CM_REV_CM3) {

arch/mips/kernel/mips-cm.c

381

if (mips_cm_revision() < CM_REV_CM3) {

arch/mips/kernel/mips-cm.c

408

if (revision < CM_REV_CM3) { /* CM2 */

arch/mips/kernel/mips-cpc.c

115

if (mips_cm_revision() >= CM_REV_CM3)

arch/mips/kernel/mips-cpc.c

94

if (mips_cm_revision() >= CM_REV_CM3)

arch/mips/kernel/pm-cps.c

475

if (mips_cm_revision() < CM_REV_CM3) {

arch/mips/kernel/pm-cps.c

563

uasm_i_addiu(&p, GPR_T0, GPR_ZERO, mips_cm_revision() < CM_REV_CM3

arch/mips/kernel/smp-cps.c

274

if (core_entry_reg && mips_cm_revision() >= CM_REV_CM3)

arch/mips/kernel/smp-cps.c

539

if (mips_cm_revision() < CM_REV_CM3)

arch/mips/kernel/smp-cps.c

548

if (mips_cm_revision() >= CM_REV_CM3) {

arch/mips/kernel/smp-cps.c

691

if (mips_cm_revision() >= CM_REV_CM3) {

arch/mips/kernel/traps.c

1694

if (mips_cm_revision() >= CM_REV_CM3) {

arch/mips/mm/sc-mips.c

192

if (mips_cm_revision() >= CM_REV_CM3)

drivers/clocksource/mips-gic-timer.c

228

if (mips_cm_revision() >= CM_REV_CM3 || !IS_ENABLED(CONFIG_CPU_FREQ))

drivers/clocksource/mips-gic-timer.c

294

if ((mips_cm_revision() >= CM_REV_CM3 || !IS_ENABLED(CONFIG_CPU_FREQ)) &&