sound/pci/cmipci.c

1417

snd_cmipci_clear_bit(cm, CM_REG_INT_HLDCLR, mask);

sound/pci/cmipci.c

1418

snd_cmipci_set_bit(cm, CM_REG_INT_HLDCLR, mask);

sound/pci/cmipci.c

2742

detect = snd_cmipci_read(cm, CM_REG_INT_HLDCLR) & CM_CHIP_MASK2;

sound/pci/cmipci.c

2852

snd_cmipci_write(cm, CM_REG_INT_HLDCLR, 0); /* disable ints */

sound/pci/cmipci.c

2995

snd_cmipci_write(cm, CM_REG_INT_HLDCLR, 0); /* disable ints */

sound/pci/cmipci.c

3029

switch (snd_cmipci_read_b(cm, CM_REG_INT_HLDCLR + 3) & 0x03) {

sound/pci/cmipci.c

3221

CM_REG_INT_STATUS, CM_REG_INT_HLDCLR, CM_REG_FUNCTRL0,

sound/pci/cmipci.c

3250

snd_cmipci_write(cm, CM_REG_INT_HLDCLR, 0);

sound/pci/cmipci.c

3261

snd_cmipci_write(cm, CM_REG_INT_HLDCLR, 0);

sound/pci/cmipci.c

866

snd_cmipci_set_bit(cm, CM_REG_INT_HLDCLR, inthld);

sound/pci/cmipci.c

875

snd_cmipci_clear_bit(cm, CM_REG_INT_HLDCLR, inthld);