Symbol: CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN
arch/mips/kernel/mips-cm.c
213
if (base_reg & CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN)
arch/mips/kernel/mips-cm.c
237
write_gcr_l2_only_sync_base(addr | CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN);