nixge_dma_read_reg
regval = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET);
regval = nixge_dma_read_reg(priv, XAXIDMA_TX_CR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_TX_CR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_TX_CR_OFFSET);
status = nixge_dma_read_reg(priv, XAXIDMA_RX_SR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET);
status = nixge_dma_read_reg(priv, XAXIDMA_TX_SR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_TX_CR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET);
status = nixge_dma_read_reg(priv, XAXIDMA_RX_SR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_TX_CR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET);
cr = nixge_dma_read_reg(lp, XAXIDMA_RX_CR_OFFSET);
cr = nixge_dma_read_reg(lp, XAXIDMA_TX_CR_OFFSET);
cr = nixge_dma_read_reg(lp, XAXIDMA_RX_CR_OFFSET);
cr = nixge_dma_read_reg(lp, XAXIDMA_TX_CR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET);
cr = nixge_dma_read_reg(priv, XAXIDMA_TX_CR_OFFSET);