drivers/crypto/cavium/nitrox/nitrox_hal.c

105

nitrox_write_csr(ndev, offset, pkt_in_ctl.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

138

nitrox_write_csr(ndev, offset, cmdq->dma);

drivers/crypto/cavium/nitrox/nitrox_hal.c

144

nitrox_write_csr(ndev, offset, pkt_in_rsize.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

148

nitrox_write_csr(ndev, offset, 0xffffffff);

drivers/crypto/cavium/nitrox/nitrox_hal.c

154

nitrox_write_csr(ndev, offset, pkt_in_dbell.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

172

nitrox_write_csr(ndev, offset, pkt_slc_ctl.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

187

nitrox_write_csr(ndev, offset, pkt_slc_cnts.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

207

nitrox_write_csr(ndev, offset, pkt_slc_ctl.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

230

nitrox_write_csr(ndev, offset, pkt_slc_int.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

261

nitrox_write_csr(ndev, NPS_CORE_INT_ENA_W1S, core_int.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

269

nitrox_write_csr(ndev, NPS_CORE_CONTROL, 1ULL);

drivers/crypto/cavium/nitrox/nitrox_hal.c

275

nitrox_write_csr(ndev, NPS_CORE_GBL_VFCFG, core_gbl_vfcfg.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

290

nitrox_write_csr(ndev, NPS_PKT_IN_RERR_LO_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

291

nitrox_write_csr(ndev, NPS_PKT_IN_RERR_HI_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

292

nitrox_write_csr(ndev, NPS_PKT_IN_ERR_TYPE_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

294

nitrox_write_csr(ndev, NPS_PKT_SLC_RERR_HI_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

295

nitrox_write_csr(ndev, NPS_PKT_SLC_RERR_LO_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

296

nitrox_write_csr(ndev, NPS_PKT_SLC_ERR_TYPE_ENA_W1S, (~0uLL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

31

nitrox_write_csr(ndev, EMU_AE_ENABLEX(i), emu_ae.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

32

nitrox_write_csr(ndev, EMU_SE_ENABLEX(i), emu_se.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

321

nitrox_write_csr(ndev, offset, aqmq_en_reg.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

336

nitrox_write_csr(ndev, offset, cmp_cnt.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

348

nitrox_write_csr(ndev, offset, aqmq_en_reg.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

370

nitrox_write_csr(ndev, offset, drbl.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

376

nitrox_write_csr(ndev, offset, 0ULL);

drivers/crypto/cavium/nitrox/nitrox_hal.c

380

nitrox_write_csr(ndev, offset, cmdq->dma);

drivers/crypto/cavium/nitrox/nitrox_hal.c

386

nitrox_write_csr(ndev, offset, qsize.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

392

nitrox_write_csr(ndev, offset, cmp_thr.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

402

nitrox_write_csr(ndev, AQM_DBELL_OVF_LO_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

403

nitrox_write_csr(ndev, AQM_DBELL_OVF_HI_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

404

nitrox_write_csr(ndev, AQM_DMA_RD_ERR_LO_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

405

nitrox_write_csr(ndev, AQM_DMA_RD_ERR_HI_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

406

nitrox_write_csr(ndev, AQM_EXEC_NA_LO_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

407

nitrox_write_csr(ndev, AQM_EXEC_NA_HI_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

408

nitrox_write_csr(ndev, AQM_EXEC_ERR_LO_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

409

nitrox_write_csr(ndev, AQM_EXEC_ERR_HI_ENA_W1S, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

429

nitrox_write_csr(ndev, POM_INT_ENA_W1S, pom_int.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

433

nitrox_write_csr(ndev, POM_PERF_CTL, BIT_ULL(i));

drivers/crypto/cavium/nitrox/nitrox_hal.c

449

nitrox_write_csr(ndev, offset, efl_rnm_ctl.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

466

nitrox_write_csr(ndev, offset, efl_core_int.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

469

nitrox_write_csr(ndev, offset, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

471

nitrox_write_csr(ndev, offset, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

487

nitrox_write_csr(ndev, offset, bmi_ctl.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

495

nitrox_write_csr(ndev, offset, bmi_int_ena.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

507

nitrox_write_csr(ndev, offset, bmo_ctl2.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

521

nitrox_write_csr(ndev, offset, lbc_ctl.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

546

nitrox_write_csr(ndev, offset, lbc_int_ena.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

549

nitrox_write_csr(ndev, offset, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

551

nitrox_write_csr(ndev, offset, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

554

nitrox_write_csr(ndev, offset, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

556

nitrox_write_csr(ndev, offset, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_hal.c

566

nitrox_write_csr(ndev, NPS_CORE_GBL_VFCFG, vfcfg.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

59

nitrox_write_csr(ndev, offset, emu_wd_int.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

61

nitrox_write_csr(ndev, offset, emu_ge_int.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

660

nitrox_write_csr(ndev, reg_addr, value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

664

nitrox_write_csr(ndev, reg_addr, value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

674

nitrox_write_csr(ndev, reg_addr, value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

678

nitrox_write_csr(ndev, reg_addr, value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

76

nitrox_write_csr(ndev, offset, pkt_in_ctl.value);

drivers/crypto/cavium/nitrox/nitrox_hal.c

90

nitrox_write_csr(ndev, offset, pkt_in_cnts.value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

105

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

116

nitrox_write_csr(ndev, POM_INT, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

125

nitrox_write_csr(ndev, PEM0_INT, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

142

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

145

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

157

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

160

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

166

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

169

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

171

nitrox_write_csr(ndev, LBC_INT, lbc_int.value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

184

nitrox_write_csr(ndev, offset, core_int.value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

190

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

200

nitrox_write_csr(ndev, BMI_INT, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

258

nitrox_write_csr(ndev, NPS_CORE_INT_ACTIVE, core_int.value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

48

nitrox_write_csr(ndev, NPS_CORE_INT, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

66

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

72

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

82

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

90

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_isr.c

95

nitrox_write_csr(ndev, offset, value);

drivers/crypto/cavium/nitrox/nitrox_main.c

101

nitrox_write_csr(ndev, offset, data);

drivers/crypto/cavium/nitrox/nitrox_main.c

153

nitrox_write_csr(ndev, offset, (~0ULL));

drivers/crypto/cavium/nitrox/nitrox_main.c

169

nitrox_write_csr(ndev, offset, core_2_eid_val.value);

drivers/crypto/cavium/nitrox/nitrox_main.c

205

nitrox_write_csr(ndev, offset, aqm_grp_execmask_lo.value);

drivers/crypto/cavium/nitrox/nitrox_main.c

208

nitrox_write_csr(ndev, offset, aqm_grp_execmask_hi.value);

drivers/crypto/cavium/nitrox/nitrox_main.c

224

nitrox_write_csr(ndev, offset, core_2_eid_val.value);

drivers/crypto/cavium/nitrox/nitrox_main.c

94

nitrox_write_csr(ndev, offset, block_num);

drivers/crypto/cavium/nitrox/nitrox_mbx.c

151

nitrox_write_csr(ndev, reg_addr, BIT_ULL(i));

drivers/crypto/cavium/nitrox/nitrox_mbx.c

175

nitrox_write_csr(ndev, reg_addr, BIT_ULL(i));

drivers/crypto/cavium/nitrox/nitrox_mbx.c

53

nitrox_write_csr(ndev, reg_addr, value);