arch/arm/mm/context.c

261

asid = new_context(mm, cpu);

arch/arm64/mm/context.c

250

asid = new_context(mm);

arch/arm64/mm/context.c

298

asid = new_context(mm);

arch/csky/mm/asid.c

147

asid = new_context(info, pasid, mm);

drivers/gpu/drm/amd/display/dc/core/dc.c

3524

struct dc_state **new_context)

drivers/gpu/drm/amd/display/dc/core/dc.c

3674

*new_context = context;

drivers/gpu/drm/amd/display/dc/core/dc.c

4773

struct dc_state *new_context, struct dc_stream_state *stream)

drivers/gpu/drm/amd/display/dc/core/dc.c

4787

dc->current_state = new_context;

drivers/gpu/drm/amd/display/dc/core/dc.c

4792

pipe_ctx = &new_context->res_ctx.pipe_ctx[i];

drivers/gpu/drm/amd/display/dc/core/dc.c

4816

struct dc_state *new_context,

drivers/gpu/drm/amd/display/dc/core/dc.c

4825

create_minimal_transition_state(dc, new_context,

drivers/gpu/drm/amd/display/dc/core/dc.c

4833

new_context)) {

drivers/gpu/drm/amd/display/dc/core/dc.c

4844

dc, intermediate_context, new_context, &policy);

drivers/gpu/drm/amd/display/dc/core/dc.c

4850

struct dc_state *new_context, struct dc_stream_state *stream)

drivers/gpu/drm/amd/display/dc/core/dc.c

4880

new_context)) {

drivers/gpu/drm/amd/display/dc/core/dc.c

4924

struct dc_state *new_context,

drivers/gpu/drm/amd/display/dc/core/dc.c

4930

dc, new_context, stream, NULL,

drivers/gpu/drm/amd/display/dc/core/dc.c

4934

new_context, stream);

drivers/gpu/drm/amd/display/dc/core/dc.c

5338

struct dc_state *new_context)

drivers/gpu/drm/amd/display/dc/core/dc.c

5358

if (!dc->hwss.is_pipe_topology_transition_seamless(dc, dc->current_state, new_context)) {

drivers/gpu/drm/amd/display/dc/core/dc.c

5366

if (commit_minimal_transition_based_on_new_context(dc, new_context, stream, stream_update,

drivers/gpu/drm/amd/display/dc/core/dc.c

5369

dc_state_release(new_context);

drivers/gpu/drm/amd/display/dc/core/dc.c

5370

new_context = dc->current_state;

drivers/gpu/drm/amd/display/dc/core/dc.c

5379

commit_minimal_transition_based_on_current_context(dc, new_context, stream);

drivers/gpu/drm/amd/display/dc/core/dc.c

5382

commit_minimal_transition_state_in_dc_update(dc, new_context, stream,

drivers/gpu/drm/amd/display/dc/core/dc.c

5394

commit_planes_for_stream(dc, srf_updates, surface_count, stream, stream_update, update_type, new_context);

drivers/gpu/drm/amd/display/dc/core/dc.c

5395

swap_and_release_current_context(dc, new_context, stream);

drivers/gpu/drm/amd/display/dc/core/dc.c

5404

struct dc_state *new_context;

drivers/gpu/drm/amd/display/dc/core/dc.c

5419

&new_context))

drivers/gpu/drm/amd/display/dc/core/dc.c

5422

if (new_context == dc->current_state) {

drivers/gpu/drm/amd/display/dc/core/dc.c

5432

stream_update, update_type, new_context);

drivers/gpu/drm/amd/display/dc/core/dc.c

7203

struct dc_state *new_context;

drivers/gpu/drm/amd/display/dc/core/dc.c

7263

scratch->new_context

drivers/gpu/drm/amd/display/dc/core/dc.c

7292

&scratch->new_context

drivers/gpu/drm/amd/display/dc/core/dc.c

7297

if (scratch->new_context == scratch->dc->current_state) {

drivers/gpu/drm/amd/display/dc/core/dc.c

7330

scratch->new_context

drivers/gpu/drm/amd/display/dc/core/dc.c

7347

scratch->new_context,

drivers/gpu/drm/amd/display/dc/core/dc.c

7400

intermediate_context ? scratch->intermediate_context : scratch->new_context

drivers/gpu/drm/amd/display/dc/core/dc.c

7417

scratch->new_context

drivers/gpu/drm/amd/display/dc/core/dc.c

7449

backup ? scratch->backup_context : scratch->new_context,

drivers/gpu/drm/amd/display/dc/core/dc.c

7476

swap_and_release_current_context(scratch->dc, scratch->new_context, scratch->stream);

drivers/gpu/drm/amd/display/dc/core/dc.c

7482

dc_state_release(scratch->new_context);

drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c

672

{I40E_HMC_STORE(i40e_hmc_obj_txq, new_context), 1, 30 },

drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h

56

u8 new_context;

drivers/net/ethernet/intel/i40e/i40e_main.c

3467

tx_ctx.new_context = 1;