drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

162

mtk_phy_update_bits(base + HDMI_CON0,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

167

mtk_phy_update_bits(base + HDMI_CON0,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

172

mtk_phy_update_bits(base + HDMI_CON0,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

189

mtk_phy_update_bits(base + HDMI_CON4,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

197

mtk_phy_update_bits(base + HDMI_CON6,

drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c

204

mtk_phy_update_bits(base + HDMI_CON5,

drivers/phy/mediatek/phy-mtk-io.h

43

mtk_phy_update_bits(reg, mask, FIELD_PREP(mask, val)); \

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

155

mtk_phy_update_bits(base + MIPITX_DSI_BG_CON,

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

168

mtk_phy_update_bits(base + MIPITX_DSI_TOP_CON,

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

176

mtk_phy_update_bits(base + MIPITX_DSI_PLL_PWR,

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

182

mtk_phy_update_bits(base + MIPITX_DSI_PLL_CON0,

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c

225

mtk_phy_update_bits(base + MIPITX_DSI_PLL_PWR,

drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c

128

mtk_phy_update_bits(mipi_tx->regs +

drivers/phy/mediatek/phy-mtk-tphy.c

1033

mtk_phy_update_bits(phyd + ANA_RG_CTRL_SIGNAL6,

drivers/phy/mediatek/phy-mtk-tphy.c

1042

mtk_phy_update_bits(phyd + ANA_RG_CTRL_SIGNAL4,

drivers/phy/mediatek/phy-mtk-tphy.c

1047

mtk_phy_update_bits(phyd + PHYD_CTRL_SIGNAL_MODE4,

drivers/phy/mediatek/phy-mtk-tphy.c

1054

mtk_phy_update_bits(phyd + PHYD_DESIGN_OPTION9,

drivers/phy/mediatek/phy-mtk-tphy.c

1059

mtk_phy_update_bits(phyd + PHYD_DESIGN_OPTION9,

drivers/phy/mediatek/phy-mtk-tphy.c

788

mtk_phy_update_bits(u3_banks->phyd + U3P_U3_PHYD_CDR1,

drivers/phy/mediatek/phy-mtk-tphy.c

960

mtk_phy_update_bits(phya + U3P_U3_PHYA_DA_REG0,

drivers/phy/mediatek/phy-mtk-tphy.c

976

mtk_phy_update_bits(phya + U3P_U3_PHYA_DA_REG5,

drivers/phy/mediatek/phy-mtk-tphy.c

981

mtk_phy_update_bits(phya + U3P_U3_PHYA_DA_REG4,

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

118

mtk_phy_update_bits(xfi_tphy->base + 0x9024, 0x100000, is_10g ? 0x0 : 0x100000);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

119

mtk_phy_update_bits(xfi_tphy->base + 0x2020, 0x202000, is_5g ? 0x202000 : 0x0);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

120

mtk_phy_update_bits(xfi_tphy->base + 0x2030, 0x500, is_1g ? 0x0 : 0x500);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

121

mtk_phy_update_bits(xfi_tphy->base + 0x2034, 0xa00, is_1g ? 0x0 : 0xa00);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

122

mtk_phy_update_bits(xfi_tphy->base + 0x2040, 0x340000, is_1g ? 0x200000 : 0x140000);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

125

mtk_phy_update_bits(xfi_tphy->base + 0x50f0, 0xc10, is_1g ? 0x410 : is_5g ? 0x800 : 0x400);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

126

mtk_phy_update_bits(xfi_tphy->base + 0x50e0, 0x4000, is_5g ? 0x0 : 0x4000);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

129

mtk_phy_update_bits(xfi_tphy->base + 0x506c, 0x30000, is_5g ? 0x0 : 0x30000);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

130

mtk_phy_update_bits(xfi_tphy->base + 0x5070, 0x670000, is_5g ? 0x620000 : 0x50000);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

131

mtk_phy_update_bits(xfi_tphy->base + 0x5074, 0x180000, is_5g ? 0x180000 : 0x0);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

132

mtk_phy_update_bits(xfi_tphy->base + 0x5078, 0xf000400, is_5g ? 0x8000000 :

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

134

mtk_phy_update_bits(xfi_tphy->base + 0x507c, 0x5000500, is_5g ? 0x4000400 :

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

136

mtk_phy_update_bits(xfi_tphy->base + 0x5080, 0x1410, is_1g ? 0x400 : is_5g ? 0x1010 : 0x0);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

137

mtk_phy_update_bits(xfi_tphy->base + 0x5084, 0x30300, is_1g ? 0x30300 :

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

140

mtk_phy_update_bits(xfi_tphy->base + 0x5088, 0x60200, is_1g ? 0x20200 :

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

145

mtk_phy_update_bits(xfi_tphy->base + 0x50e4, 0xc0000, is_5g ? 0x0 : 0xc0000);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

146

mtk_phy_update_bits(xfi_tphy->base + 0x50e8, 0x40000, is_5g ? 0x0 : 0x40000);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

147

mtk_phy_update_bits(xfi_tphy->base + 0x50ec, 0xa00, is_1g ? 0x200 : 0x800);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

148

mtk_phy_update_bits(xfi_tphy->base + 0x50a8, 0xee0000, is_5g ? 0x800000 :

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

150

mtk_phy_update_bits(xfi_tphy->base + 0x6004, 0x190000, is_5g ? 0x0 : 0x190000);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

162

mtk_phy_update_bits(xfi_tphy->base + REG_DIG_GLB_F4,

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

179

mtk_phy_update_bits(xfi_tphy->base + 0x30b0, 0x30, 0x20);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

202

mtk_phy_update_bits(xfi_tphy->base + 0x3050, 0xa8000000,

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

204

mtk_phy_update_bits(xfi_tphy->base + 0x3054, 0xaa,

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

214

mtk_phy_update_bits(xfi_tphy->base + 0xa008, 0x10000, da_war ? 0x10000 : 0x0);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

216

mtk_phy_update_bits(xfi_tphy->base + 0xa060, 0x50000, use_lynxi_pcs ? 0x50000 : 0x40000);

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

219

mtk_phy_update_bits(xfi_tphy->base + REG_ANA_GLB_D0,

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

233

mtk_phy_update_bits(xfi_tphy->base + REG_DIG_GLB_70,

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

249

mtk_phy_update_bits(xfi_tphy->base + REG_DIG_GLB_70,

drivers/phy/mediatek/phy-mtk-xfi-tphy.c

254

mtk_phy_update_bits(xfi_tphy->base + REG_DIG_GLB_70,

drivers/phy/mediatek/phy-mtk-xsphy.c

198

mtk_phy_update_bits(pbase + XSP_U2PHYDTM1,

drivers/phy/mediatek/phy-mtk-xsphy.c

213

mtk_phy_update_bits(pbase + XSP_U2PHYDTM1,