netc_reg_write
netc_reg_write(priv->netcmix, IMX95_CFG_LINK_IO_VAR,
netc_reg_write(priv->netcmix, IMX95_CFG_LINK_PCS_PROT(2),
netc_reg_write(priv->netcmix, IMX95_CFG_LINK_MII_PROT, val);
netc_reg_write(priv->netcmix, IMX94_NETC_LINK_CFG(link_id), val);
netc_reg_write(priv->netcmix, IMX94_EXT_PIN_CONTROL, val);
netc_reg_write(priv->prb, PRB_NETCRR, NETCRR_LOCK);
netc_reg_write(priv->prb, PRB_NETCRR, 0);
netc_reg_write(priv->ierb, IERB_LBCR(0),
netc_reg_write(priv->ierb, IERB_LBCR(1),
netc_reg_write(priv->ierb, IERB_LBCR(2),
netc_reg_write(priv->ierb, IERB_EMDIOFAUXR, 0);
netc_reg_write(priv->ierb, IERB_EFAUXR(0), 0);
netc_reg_write(priv->ierb, IERB_VFAUXR(0), 1);
netc_reg_write(priv->ierb, IERB_VFAUXR(1), 2);
netc_reg_write(priv->ierb, IERB_EFAUXR(1), 3);
netc_reg_write(priv->ierb, IERB_VFAUXR(2), 5);
netc_reg_write(priv->ierb, IERB_VFAUXR(3), 6);
netc_reg_write(priv->ierb, IERB_EFAUXR(2), 4);
netc_reg_write(priv->ierb, IERB_VFAUXR(4), 5);
netc_reg_write(priv->ierb, IERB_VFAUXR(5), 6);
netc_reg_write(priv->ierb, IERB_T0FAUXR, 7);
netc_reg_write(priv->ierb, IERB_ETBCR(eid), tid);
netc_reg_write(priv->ierb, IERB_LBCR(IMX94_ENETC0_LINK),
netc_reg_write(priv->ierb, IERB_LBCR(IMX94_ENETC1_LINK),
netc_reg_write(priv->ierb, IERB_LBCR(IMX94_ENETC2_LINK),