drivers/i2c/busses/i2c-mt65xx.c

1041

control_reg = mtk_i2c_readw(i2c, OFFSET_CONTROL) &

drivers/i2c/busses/i2c-mt65xx.c

1324

intr_stat = mtk_i2c_readw(i2c, OFFSET_INTR_STAT);

drivers/i2c/busses/i2c-mt65xx.c

561

intr_stat_reg = mtk_i2c_readw(i2c, OFFSET_INTR_STAT);

drivers/i2c/busses/i2c-mt65xx.c

948

mtk_i2c_readw(i2c, OFFSET_SLAVE_ADDR),

drivers/i2c/busses/i2c-mt65xx.c

949

mtk_i2c_readw(i2c, OFFSET_INTR_MASK));

drivers/i2c/busses/i2c-mt65xx.c

951

mtk_i2c_readw(i2c, OFFSET_INTR_STAT),

drivers/i2c/busses/i2c-mt65xx.c

952

mtk_i2c_readw(i2c, OFFSET_CONTROL));

drivers/i2c/busses/i2c-mt65xx.c

954

mtk_i2c_readw(i2c, OFFSET_TRANSFER_LEN),

drivers/i2c/busses/i2c-mt65xx.c

955

mtk_i2c_readw(i2c, OFFSET_TRANSAC_LEN));

drivers/i2c/busses/i2c-mt65xx.c

957

mtk_i2c_readw(i2c, OFFSET_DELAY_LEN),

drivers/i2c/busses/i2c-mt65xx.c

958

mtk_i2c_readw(i2c, OFFSET_TIMING));

drivers/i2c/busses/i2c-mt65xx.c

960

mtk_i2c_readw(i2c, OFFSET_START),

drivers/i2c/busses/i2c-mt65xx.c

961

mtk_i2c_readw(i2c, OFFSET_EXT_CONF));

drivers/i2c/busses/i2c-mt65xx.c

963

mtk_i2c_readw(i2c, OFFSET_HS),

drivers/i2c/busses/i2c-mt65xx.c

964

mtk_i2c_readw(i2c, OFFSET_IO_CONFIG));

drivers/i2c/busses/i2c-mt65xx.c

966

mtk_i2c_readw(i2c, OFFSET_DCM_EN),

drivers/i2c/busses/i2c-mt65xx.c

967

mtk_i2c_readw(i2c, OFFSET_TRANSFER_LEN_AUX));

drivers/i2c/busses/i2c-mt65xx.c

969

mtk_i2c_readw(i2c, OFFSET_CLOCK_DIV),

drivers/i2c/busses/i2c-mt65xx.c

970

mtk_i2c_readw(i2c, OFFSET_FIFO_STAT));

drivers/i2c/busses/i2c-mt65xx.c

972

mtk_i2c_readw(i2c, OFFSET_DEBUGCTRL),

drivers/i2c/busses/i2c-mt65xx.c

973

mtk_i2c_readw(i2c, OFFSET_DEBUGSTAT));

drivers/i2c/busses/i2c-mt65xx.c

976

mtk_i2c_readw(i2c, OFFSET_LTIMING),

drivers/i2c/busses/i2c-mt65xx.c

977

mtk_i2c_readw(i2c, OFFSET_MULTI_DMA));