drivers/gpu/drm/mediatek/mtk_dp.c

1000

static u32 mtk_dp_swirq_get_clear(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1002

u32 irq_status = mtk_dp_read(mtk_dp, MTK_DP_TRANS_P0_35D0) &

drivers/gpu/drm/mediatek/mtk_dp.c

1006

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_35C8,

drivers/gpu/drm/mediatek/mtk_dp.c

1008

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_35C8,

drivers/gpu/drm/mediatek/mtk_dp.c

1015

static u32 mtk_dp_hwirq_get_clear(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1017

u32 irq_status = (mtk_dp_read(mtk_dp, MTK_DP_TRANS_P0_3418) &

drivers/gpu/drm/mediatek/mtk_dp.c

1021

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3418,

drivers/gpu/drm/mediatek/mtk_dp.c

1023

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3418,

drivers/gpu/drm/mediatek/mtk_dp.c

1030

static void mtk_dp_hwirq_enable(struct mtk_dp *mtk_dp, bool enable)

drivers/gpu/drm/mediatek/mtk_dp.c

1032

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3418,

drivers/gpu/drm/mediatek/mtk_dp.c

1040

static void mtk_dp_initialize_settings(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1042

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_342C,

drivers/gpu/drm/mediatek/mtk_dp.c

1045

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3540,

drivers/gpu/drm/mediatek/mtk_dp.c

1048

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_31EC,

drivers/gpu/drm/mediatek/mtk_dp.c

1051

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_304C,

drivers/gpu/drm/mediatek/mtk_dp.c

1053

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_IRQ_MASK,

drivers/gpu/drm/mediatek/mtk_dp.c

1057

static void mtk_dp_initialize_hpd_detect_settings(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1061

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3410,

drivers/gpu/drm/mediatek/mtk_dp.c

1066

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3410,

drivers/gpu/drm/mediatek/mtk_dp.c

1074

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3410,

drivers/gpu/drm/mediatek/mtk_dp.c

1078

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3430,

drivers/gpu/drm/mediatek/mtk_dp.c

1083

static void mtk_dp_initialize_aux_settings(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1086

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_360C,

drivers/gpu/drm/mediatek/mtk_dp.c

1089

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3658,

drivers/gpu/drm/mediatek/mtk_dp.c

1092

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3634,

drivers/gpu/drm/mediatek/mtk_dp.c

1096

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3614,

drivers/gpu/drm/mediatek/mtk_dp.c

1099

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_37C8,

drivers/gpu/drm/mediatek/mtk_dp.c

1104

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3690,

drivers/gpu/drm/mediatek/mtk_dp.c

1109

static void mtk_dp_initialize_digital_settings(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1111

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_304C,

drivers/gpu/drm/mediatek/mtk_dp.c

1114

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3368,

drivers/gpu/drm/mediatek/mtk_dp.c

1119

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3004,

drivers/gpu/drm/mediatek/mtk_dp.c

1125

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3004,

drivers/gpu/drm/mediatek/mtk_dp.c

1129

static void mtk_dp_digital_sw_reset(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1131

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_340C,

drivers/gpu/drm/mediatek/mtk_dp.c

1137

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_340C,

drivers/gpu/drm/mediatek/mtk_dp.c

1141

static void mtk_dp_sdp_path_reset(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1143

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3004,

drivers/gpu/drm/mediatek/mtk_dp.c

1149

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3004,

drivers/gpu/drm/mediatek/mtk_dp.c

1153

static void mtk_dp_set_lanes(struct mtk_dp *mtk_dp, int lanes)

drivers/gpu/drm/mediatek/mtk_dp.c

1155

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_35F0,

drivers/gpu/drm/mediatek/mtk_dp.c

1158

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3000,

drivers/gpu/drm/mediatek/mtk_dp.c

1160

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_34A4,

drivers/gpu/drm/mediatek/mtk_dp.c

1164

static void mtk_dp_get_calibration_data(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1167

struct device *dev = mtk_dp->dev;

drivers/gpu/drm/mediatek/mtk_dp.c

1169

u32 *cal_data = mtk_dp->cal_data;

drivers/gpu/drm/mediatek/mtk_dp.c

1192

fmt = &mtk_dp->data->efuse_fmt[i];

drivers/gpu/drm/mediatek/mtk_dp.c

1195

dev_warn(mtk_dp->dev,

drivers/gpu/drm/mediatek/mtk_dp.c

1205

dev_warn(mtk_dp->dev, "Invalid efuse data, idx = %d\n", i);

drivers/gpu/drm/mediatek/mtk_dp.c

1215

dev_warn(mtk_dp->dev, "Use default calibration data\n");

drivers/gpu/drm/mediatek/mtk_dp.c

1217

cal_data[i] = mtk_dp->data->efuse_fmt[i].default_val;

drivers/gpu/drm/mediatek/mtk_dp.c

1220

static void mtk_dp_set_calibration_data(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1222

u32 *cal_data = mtk_dp->cal_data;

drivers/gpu/drm/mediatek/mtk_dp.c

1224

mtk_dp_update_bits(mtk_dp, DP_PHY_GLB_DPAUX_TX,

drivers/gpu/drm/mediatek/mtk_dp.c

1227

mtk_dp_update_bits(mtk_dp, DP_PHY_GLB_BIAS_GEN_00,

drivers/gpu/drm/mediatek/mtk_dp.c

1230

mtk_dp_update_bits(mtk_dp, DP_PHY_LANE_TX_0,

drivers/gpu/drm/mediatek/mtk_dp.c

1233

mtk_dp_update_bits(mtk_dp, DP_PHY_LANE_TX_0,

drivers/gpu/drm/mediatek/mtk_dp.c

1236

mtk_dp_update_bits(mtk_dp, DP_PHY_LANE_TX_1,

drivers/gpu/drm/mediatek/mtk_dp.c

1239

mtk_dp_update_bits(mtk_dp, DP_PHY_LANE_TX_1,

drivers/gpu/drm/mediatek/mtk_dp.c

1242

mtk_dp_update_bits(mtk_dp, DP_PHY_LANE_TX_2,

drivers/gpu/drm/mediatek/mtk_dp.c

1245

mtk_dp_update_bits(mtk_dp, DP_PHY_LANE_TX_2,

drivers/gpu/drm/mediatek/mtk_dp.c

1248

mtk_dp_update_bits(mtk_dp, DP_PHY_LANE_TX_3,

drivers/gpu/drm/mediatek/mtk_dp.c

1251

mtk_dp_update_bits(mtk_dp, DP_PHY_LANE_TX_3,

drivers/gpu/drm/mediatek/mtk_dp.c

1256

static int mtk_dp_phy_configure(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

1266

.ssc = mtk_dp->train_info.sink_ssc,

drivers/gpu/drm/mediatek/mtk_dp.c

1270

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE, DP_PWR_STATE_BANDGAP,

drivers/gpu/drm/mediatek/mtk_dp.c

1273

ret = phy_configure(mtk_dp->phy, &phy_opts);

drivers/gpu/drm/mediatek/mtk_dp.c

1277

mtk_dp_set_calibration_data(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1278

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,

drivers/gpu/drm/mediatek/mtk_dp.c

1284

static void mtk_dp_set_idle_pattern(struct mtk_dp *mtk_dp, bool enable)

drivers/gpu/drm/mediatek/mtk_dp.c

1291

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3580,

drivers/gpu/drm/mediatek/mtk_dp.c

1295

static void mtk_dp_train_set_pattern(struct mtk_dp *mtk_dp, int pattern)

drivers/gpu/drm/mediatek/mtk_dp.c

1299

mtk_dp_set_idle_pattern(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

1301

mtk_dp_update_bits(mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

1310

static void mtk_dp_set_enhanced_frame_mode(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1312

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3000,

drivers/gpu/drm/mediatek/mtk_dp.c

1317

static void mtk_dp_training_set_scramble(struct mtk_dp *mtk_dp, bool enable)

drivers/gpu/drm/mediatek/mtk_dp.c

1319

mtk_dp_update_bits(mtk_dp, MTK_DP_TRANS_P0_3404,

drivers/gpu/drm/mediatek/mtk_dp.c

1324

static void mtk_dp_video_mute(struct mtk_dp *mtk_dp, bool enable)

drivers/gpu/drm/mediatek/mtk_dp.c

1330

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3000,

drivers/gpu/drm/mediatek/mtk_dp.c

1336

mtk_dp->data->smc_cmd, enable,

drivers/gpu/drm/mediatek/mtk_dp.c

1339

dev_dbg(mtk_dp->dev, "smc cmd: 0x%x, p1: %s, ret: 0x%lx-0x%lx\n",

drivers/gpu/drm/mediatek/mtk_dp.c

1340

mtk_dp->data->smc_cmd, enable ? "enable" : "disable", res.a0, res.a1);

drivers/gpu/drm/mediatek/mtk_dp.c

1343

static void mtk_dp_audio_mute(struct mtk_dp *mtk_dp, bool mute)

drivers/gpu/drm/mediatek/mtk_dp.c

1359

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3030,

drivers/gpu/drm/mediatek/mtk_dp.c

1363

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3088,

drivers/gpu/drm/mediatek/mtk_dp.c

1365

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_30A4,

drivers/gpu/drm/mediatek/mtk_dp.c

1369

static void mtk_dp_aux_panel_poweron(struct mtk_dp *mtk_dp, bool pwron)

drivers/gpu/drm/mediatek/mtk_dp.c

1373

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,

drivers/gpu/drm/mediatek/mtk_dp.c

1378

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);

drivers/gpu/drm/mediatek/mtk_dp.c

1382

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D3);

drivers/gpu/drm/mediatek/mtk_dp.c

1386

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,

drivers/gpu/drm/mediatek/mtk_dp.c

1392

static void mtk_dp_power_enable(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1394

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_RESET_AND_PROBE,

drivers/gpu/drm/mediatek/mtk_dp.c

1400

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_RESET_AND_PROBE,

drivers/gpu/drm/mediatek/mtk_dp.c

1402

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,

drivers/gpu/drm/mediatek/mtk_dp.c

1404

mtk_dp_write(mtk_dp, MTK_DP_1040,

drivers/gpu/drm/mediatek/mtk_dp.c

1407

mtk_dp_update_bits(mtk_dp, MTK_DP_0034, 0, DA_CKM_CKTX0_EN_FORCE_EN);

drivers/gpu/drm/mediatek/mtk_dp.c

1410

static void mtk_dp_power_disable(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1412

mtk_dp_write(mtk_dp, MTK_DP_TOP_PWR_STATE, 0);

drivers/gpu/drm/mediatek/mtk_dp.c

1414

mtk_dp_update_bits(mtk_dp, MTK_DP_0034,

drivers/gpu/drm/mediatek/mtk_dp.c

1418

mtk_dp_write(mtk_dp, MTK_DP_1040, 0);

drivers/gpu/drm/mediatek/mtk_dp.c

1419

mtk_dp_write(mtk_dp, MTK_DP_TOP_MEM_PD,

drivers/gpu/drm/mediatek/mtk_dp.c

1423

static void mtk_dp_initialize_priv_data(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1425

bool plugged_in = (mtk_dp->bridge.type == DRM_MODE_CONNECTOR_eDP);

drivers/gpu/drm/mediatek/mtk_dp.c

1427

mtk_dp->train_info.link_rate = DP_LINK_BW_5_4;

drivers/gpu/drm/mediatek/mtk_dp.c

1428

mtk_dp->train_info.lane_count = mtk_dp->max_lanes;

drivers/gpu/drm/mediatek/mtk_dp.c

1429

mtk_dp->train_info.cable_plugged_in = plugged_in;

drivers/gpu/drm/mediatek/mtk_dp.c

1431

mtk_dp->info.format = DP_PIXELFORMAT_RGB;

drivers/gpu/drm/mediatek/mtk_dp.c

1432

memset(&mtk_dp->info.vm, 0, sizeof(struct videomode));

drivers/gpu/drm/mediatek/mtk_dp.c

1433

mtk_dp->audio_enable = false;

drivers/gpu/drm/mediatek/mtk_dp.c

1436

static void mtk_dp_sdp_set_down_cnt_init(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

1441

struct videomode *vm = &mtk_dp->info.vm;

drivers/gpu/drm/mediatek/mtk_dp.c

1447

mtk_dp->train_info.link_rate * 2700 * 8 /

drivers/gpu/drm/mediatek/mtk_dp.c

1450

switch (mtk_dp->train_info.lane_count) {

drivers/gpu/drm/mediatek/mtk_dp.c

1465

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3040,

drivers/gpu/drm/mediatek/mtk_dp.c

1470

static void mtk_dp_sdp_set_down_cnt_init_in_hblank(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1476

struct videomode *vm = &mtk_dp->info.vm;

drivers/gpu/drm/mediatek/mtk_dp.c

1480

pix_clk_mhz = mtk_dp->info.format == DP_PIXELFORMAT_YUV420 ?

drivers/gpu/drm/mediatek/mtk_dp.c

1483

switch (mtk_dp->train_info.lane_count) {

drivers/gpu/drm/mediatek/mtk_dp.c

1494

if (pix_clk_mhz > mtk_dp->train_info.link_rate * 27)

drivers/gpu/drm/mediatek/mtk_dp.c

1501

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3364, spd_down_cnt_init,

drivers/gpu/drm/mediatek/mtk_dp.c

1505

static void mtk_dp_audio_sample_arrange_disable(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1508

if (!mtk_dp->data->audio_pkt_in_hblank_area)

drivers/gpu/drm/mediatek/mtk_dp.c

1511

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3374, 0,

drivers/gpu/drm/mediatek/mtk_dp.c

1513

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3374, 0,

drivers/gpu/drm/mediatek/mtk_dp.c

1517

static void mtk_dp_setup_tu(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1520

mtk_dp->info.vm.hactive /

drivers/gpu/drm/mediatek/mtk_dp.c

1521

mtk_dp->train_info.lane_count /

drivers/gpu/drm/mediatek/mtk_dp.c

1524

mtk_dp_set_sram_read_start(mtk_dp, sram_read_start);

drivers/gpu/drm/mediatek/mtk_dp.c

1525

mtk_dp_setup_encoder(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1526

mtk_dp_audio_sample_arrange_disable(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1527

mtk_dp_sdp_set_down_cnt_init_in_hblank(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1528

mtk_dp_sdp_set_down_cnt_init(mtk_dp, sram_read_start);

drivers/gpu/drm/mediatek/mtk_dp.c

1531

static void mtk_dp_set_tx_out(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1533

mtk_dp_setup_tu(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1536

static void mtk_dp_train_update_swing_pre(struct mtk_dp *mtk_dp, int lanes,

drivers/gpu/drm/mediatek/mtk_dp.c

1561

mtk_dp_set_swing_pre_emphasis(mtk_dp, lane, swing, preemphasis);

drivers/gpu/drm/mediatek/mtk_dp.c

1562

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_LANE0_SET + lane,

drivers/gpu/drm/mediatek/mtk_dp.c

1567

static void mtk_dp_pattern(struct mtk_dp *mtk_dp, bool is_tps1)

drivers/gpu/drm/mediatek/mtk_dp.c

1576

aux_offset = mtk_dp->train_info.channel_eq_pattern;

drivers/gpu/drm/mediatek/mtk_dp.c

1578

switch (mtk_dp->train_info.channel_eq_pattern) {

drivers/gpu/drm/mediatek/mtk_dp.c

1594

mtk_dp_train_set_pattern(mtk_dp, pattern);

drivers/gpu/drm/mediatek/mtk_dp.c

1595

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET, aux_offset);

drivers/gpu/drm/mediatek/mtk_dp.c

1598

static int mtk_dp_train_setting(struct mtk_dp *mtk_dp, u8 target_link_rate,

drivers/gpu/drm/mediatek/mtk_dp.c

1603

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_LINK_BW_SET, target_link_rate);

drivers/gpu/drm/mediatek/mtk_dp.c

1604

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_LANE_COUNT_SET,

drivers/gpu/drm/mediatek/mtk_dp.c

1607

if (mtk_dp->train_info.sink_ssc)

drivers/gpu/drm/mediatek/mtk_dp.c

1608

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_DOWNSPREAD_CTRL,

drivers/gpu/drm/mediatek/mtk_dp.c

1611

mtk_dp_set_lanes(mtk_dp, target_lane_count / 2);

drivers/gpu/drm/mediatek/mtk_dp.c

1612

ret = mtk_dp_phy_configure(mtk_dp, target_link_rate, target_lane_count);

drivers/gpu/drm/mediatek/mtk_dp.c

1616

dev_dbg(mtk_dp->dev,

drivers/gpu/drm/mediatek/mtk_dp.c

1623

static int mtk_dp_train_cr(struct mtk_dp *mtk_dp, u8 target_lane_count)

drivers/gpu/drm/mediatek/mtk_dp.c

1631

mtk_dp_pattern(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

1636

if (!mtk_dp->train_info.cable_plugged_in) {

drivers/gpu/drm/mediatek/mtk_dp.c

1637

mtk_dp_train_set_pattern(mtk_dp, 0);

drivers/gpu/drm/mediatek/mtk_dp.c

1641

drm_dp_dpcd_read(&mtk_dp->aux, DP_ADJUST_REQUEST_LANE0_1,

drivers/gpu/drm/mediatek/mtk_dp.c

1643

mtk_dp_train_update_swing_pre(mtk_dp, target_lane_count,

drivers/gpu/drm/mediatek/mtk_dp.c

1646

drm_dp_link_train_clock_recovery_delay(&mtk_dp->aux,

drivers/gpu/drm/mediatek/mtk_dp.c

1647

mtk_dp->rx_cap);

drivers/gpu/drm/mediatek/mtk_dp.c

1650

drm_dp_dpcd_read_link_status(&mtk_dp->aux, link_status);

drivers/gpu/drm/mediatek/mtk_dp.c

1653

dev_dbg(mtk_dp->dev, "Link train CR pass\n");

drivers/gpu/drm/mediatek/mtk_dp.c

1673

dev_dbg(mtk_dp->dev, "Link train CR fail\n");

drivers/gpu/drm/mediatek/mtk_dp.c

1687

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/mediatek/mtk_dp.c

1689

mtk_dp_train_set_pattern(mtk_dp, 0);

drivers/gpu/drm/mediatek/mtk_dp.c

1694

static int mtk_dp_train_eq(struct mtk_dp *mtk_dp, u8 target_lane_count)

drivers/gpu/drm/mediatek/mtk_dp.c

1700

mtk_dp_pattern(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

1704

if (!mtk_dp->train_info.cable_plugged_in) {

drivers/gpu/drm/mediatek/mtk_dp.c

1705

mtk_dp_train_set_pattern(mtk_dp, 0);

drivers/gpu/drm/mediatek/mtk_dp.c

1709

drm_dp_dpcd_read(&mtk_dp->aux, DP_ADJUST_REQUEST_LANE0_1,

drivers/gpu/drm/mediatek/mtk_dp.c

1711

mtk_dp_train_update_swing_pre(mtk_dp, target_lane_count,

drivers/gpu/drm/mediatek/mtk_dp.c

1714

drm_dp_link_train_channel_eq_delay(&mtk_dp->aux,

drivers/gpu/drm/mediatek/mtk_dp.c

1715

mtk_dp->rx_cap);

drivers/gpu/drm/mediatek/mtk_dp.c

1718

drm_dp_dpcd_read_link_status(&mtk_dp->aux, link_status);

drivers/gpu/drm/mediatek/mtk_dp.c

1720

dev_dbg(mtk_dp->dev, "Link train EQ pass\n");

drivers/gpu/drm/mediatek/mtk_dp.c

1723

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/mediatek/mtk_dp.c

1725

mtk_dp_train_set_pattern(mtk_dp, 0);

drivers/gpu/drm/mediatek/mtk_dp.c

1728

dev_dbg(mtk_dp->dev, "Link train EQ fail\n");

drivers/gpu/drm/mediatek/mtk_dp.c

1732

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/mediatek/mtk_dp.c

1734

mtk_dp_train_set_pattern(mtk_dp, 0);

drivers/gpu/drm/mediatek/mtk_dp.c

1739

static int mtk_dp_parse_capabilities(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1749

if (mtk_dp->bridge.type == DRM_MODE_CONNECTOR_eDP &&

drivers/gpu/drm/mediatek/mtk_dp.c

1750

mtk_dp->rx_cap[DP_MAX_LINK_RATE] &&

drivers/gpu/drm/mediatek/mtk_dp.c

1751

mtk_dp->train_info.sink_ssc)

drivers/gpu/drm/mediatek/mtk_dp.c

1754

ret = drm_dp_read_dpcd_caps(&mtk_dp->aux, mtk_dp->rx_cap);

drivers/gpu/drm/mediatek/mtk_dp.c

1758

if (drm_dp_tps4_supported(mtk_dp->rx_cap))

drivers/gpu/drm/mediatek/mtk_dp.c

1759

mtk_dp->train_info.channel_eq_pattern = DP_TRAINING_PATTERN_4;

drivers/gpu/drm/mediatek/mtk_dp.c

1760

else if (drm_dp_tps3_supported(mtk_dp->rx_cap))

drivers/gpu/drm/mediatek/mtk_dp.c

1761

mtk_dp->train_info.channel_eq_pattern = DP_TRAINING_PATTERN_3;

drivers/gpu/drm/mediatek/mtk_dp.c

1763

mtk_dp->train_info.channel_eq_pattern = DP_TRAINING_PATTERN_2;

drivers/gpu/drm/mediatek/mtk_dp.c

1765

mtk_dp->train_info.sink_ssc = drm_dp_max_downspread(mtk_dp->rx_cap);

drivers/gpu/drm/mediatek/mtk_dp.c

1767

ret = drm_dp_dpcd_readb(&mtk_dp->aux, DP_MSTM_CAP, &val);

drivers/gpu/drm/mediatek/mtk_dp.c

1769

dev_err(mtk_dp->dev, "Read mstm cap failed: %zd\n", ret);

drivers/gpu/drm/mediatek/mtk_dp.c

1775

ret = drm_dp_dpcd_readb(&mtk_dp->aux,

drivers/gpu/drm/mediatek/mtk_dp.c

1779

dev_err(mtk_dp->dev, "Read irq vector failed: %zd\n", ret);

drivers/gpu/drm/mediatek/mtk_dp.c

1784

ret = drm_dp_dpcd_writeb(&mtk_dp->aux,

drivers/gpu/drm/mediatek/mtk_dp.c

1795

static bool mtk_dp_edid_parse_audio_capabilities(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

1798

if (!mtk_dp->data->audio_supported)

drivers/gpu/drm/mediatek/mtk_dp.c

1801

if (mtk_dp->info.audio_cur_cfg.sad_count <= 0) {

drivers/gpu/drm/mediatek/mtk_dp.c

1802

drm_info(mtk_dp->drm_dev, "The SADs is NULL\n");

drivers/gpu/drm/mediatek/mtk_dp.c

1809

static void mtk_dp_train_change_mode(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1811

phy_reset(mtk_dp->phy);

drivers/gpu/drm/mediatek/mtk_dp.c

1812

mtk_dp_reset_swing_pre_emphasis(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1815

static int mtk_dp_training(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1820

link_rate = min_t(u8, mtk_dp->max_linkrate,

drivers/gpu/drm/mediatek/mtk_dp.c

1821

mtk_dp->rx_cap[DP_MAX_LINK_RATE]);

drivers/gpu/drm/mediatek/mtk_dp.c

1823

lane_count = min_t(u8, mtk_dp->max_lanes,

drivers/gpu/drm/mediatek/mtk_dp.c

1824

drm_dp_max_lane_count(mtk_dp->rx_cap));

drivers/gpu/drm/mediatek/mtk_dp.c

1831

mtk_dp_training_set_scramble(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

1834

mtk_dp_train_change_mode(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1836

ret = mtk_dp_train_setting(mtk_dp, link_rate, lane_count);

drivers/gpu/drm/mediatek/mtk_dp.c

1840

ret = mtk_dp_train_cr(mtk_dp, lane_count);

drivers/gpu/drm/mediatek/mtk_dp.c

1867

ret = mtk_dp_train_eq(mtk_dp, lane_count);

drivers/gpu/drm/mediatek/mtk_dp.c

1885

mtk_dp->train_info.link_rate = link_rate;

drivers/gpu/drm/mediatek/mtk_dp.c

1886

mtk_dp->train_info.lane_count = lane_count;

drivers/gpu/drm/mediatek/mtk_dp.c

1892

mtk_dp_training_set_scramble(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

1893

mtk_dp_set_enhanced_frame_mode(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1898

static void mtk_dp_video_enable(struct mtk_dp *mtk_dp, bool enable)

drivers/gpu/drm/mediatek/mtk_dp.c

1902

mtk_dp_msa_bypass_enable(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

1903

mtk_dp_pg_enable(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

1904

mtk_dp_set_tx_out(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1905

mtk_dp_video_mute(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

1907

mtk_dp_video_mute(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

1908

mtk_dp_pg_enable(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

1909

mtk_dp_msa_bypass_enable(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

1913

static void mtk_dp_audio_sdp_setup(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

1939

mtk_dp_audio_sdp_asp_set_channels(mtk_dp, cfg->channels);

drivers/gpu/drm/mediatek/mtk_dp.c

1940

mtk_dp_setup_sdp_aui(mtk_dp, &sdp);

drivers/gpu/drm/mediatek/mtk_dp.c

1943

static void mtk_dp_audio_setup(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

1946

mtk_dp_audio_sdp_setup(mtk_dp, cfg);

drivers/gpu/drm/mediatek/mtk_dp.c

1947

mtk_dp_audio_channel_status_set(mtk_dp, cfg);

drivers/gpu/drm/mediatek/mtk_dp.c

1949

mtk_dp_audio_setup_channels(mtk_dp, cfg);

drivers/gpu/drm/mediatek/mtk_dp.c

1950

mtk_dp_audio_set_divider(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1953

static int mtk_dp_video_config(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1955

mtk_dp_config_mn_mode(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1956

mtk_dp_set_msa(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1957

mtk_dp_set_color_depth(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1958

return mtk_dp_set_color_format(mtk_dp, mtk_dp->info.format);

drivers/gpu/drm/mediatek/mtk_dp.c

1961

static void mtk_dp_init_port(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

1963

mtk_dp_set_idle_pattern(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

1964

mtk_dp_initialize_priv_data(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1966

mtk_dp_initialize_settings(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1967

mtk_dp_initialize_aux_settings(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1968

mtk_dp_initialize_digital_settings(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1969

mtk_dp_initialize_hpd_detect_settings(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1971

mtk_dp_digital_sw_reset(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1976

struct mtk_dp *mtk_dp = dev;

drivers/gpu/drm/mediatek/mtk_dp.c

1981

if (mtk_dp->need_debounce && mtk_dp->train_info.cable_plugged_in)

drivers/gpu/drm/mediatek/mtk_dp.c

1984

spin_lock_irqsave(&mtk_dp->irq_thread_lock, flags);

drivers/gpu/drm/mediatek/mtk_dp.c

1985

status = mtk_dp->irq_thread_handle;

drivers/gpu/drm/mediatek/mtk_dp.c

1986

mtk_dp->irq_thread_handle = 0;

drivers/gpu/drm/mediatek/mtk_dp.c

1987

spin_unlock_irqrestore(&mtk_dp->irq_thread_lock, flags);

drivers/gpu/drm/mediatek/mtk_dp.c

1990

if (mtk_dp->bridge.dev)

drivers/gpu/drm/mediatek/mtk_dp.c

1991

drm_helper_hpd_irq_event(mtk_dp->bridge.dev);

drivers/gpu/drm/mediatek/mtk_dp.c

1993

if (!mtk_dp->train_info.cable_plugged_in) {

drivers/gpu/drm/mediatek/mtk_dp.c

1994

mtk_dp_disable_sdp_aui(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

1995

memset(&mtk_dp->info.audio_cur_cfg, 0,

drivers/gpu/drm/mediatek/mtk_dp.c

1996

sizeof(mtk_dp->info.audio_cur_cfg));

drivers/gpu/drm/mediatek/mtk_dp.c

1998

mtk_dp->enabled = false;

drivers/gpu/drm/mediatek/mtk_dp.c

2000

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,

drivers/gpu/drm/mediatek/mtk_dp.c

2004

mtk_dp->need_debounce = false;

drivers/gpu/drm/mediatek/mtk_dp.c

2005

mod_timer(&mtk_dp->debounce_timer,

drivers/gpu/drm/mediatek/mtk_dp.c

2008

mtk_dp_aux_panel_poweron(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

2010

ret = mtk_dp_parse_capabilities(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2012

drm_err(mtk_dp->drm_dev, "Can't parse capabilities\n");

drivers/gpu/drm/mediatek/mtk_dp.c

2015

ret = mtk_dp_training(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2017

drm_err(mtk_dp->drm_dev, "Training failed, %d\n", ret);

drivers/gpu/drm/mediatek/mtk_dp.c

2019

mtk_dp->enabled = true;

drivers/gpu/drm/mediatek/mtk_dp.c

2024

dev_dbg(mtk_dp->dev, "Receive IRQ from sink devices\n");

drivers/gpu/drm/mediatek/mtk_dp.c

2031

struct mtk_dp *mtk_dp = dev;

drivers/gpu/drm/mediatek/mtk_dp.c

2034

u32 irq_status = mtk_dp_swirq_get_clear(mtk_dp) |

drivers/gpu/drm/mediatek/mtk_dp.c

2035

mtk_dp_hwirq_get_clear(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2040

spin_lock_irqsave(&mtk_dp->irq_thread_lock, flags);

drivers/gpu/drm/mediatek/mtk_dp.c

2043

mtk_dp->irq_thread_handle |= MTK_DP_THREAD_HPD_EVENT;

drivers/gpu/drm/mediatek/mtk_dp.c

2047

mtk_dp->irq_thread_handle |= MTK_DP_THREAD_CABLE_STATE_CHG;

drivers/gpu/drm/mediatek/mtk_dp.c

2051

spin_unlock_irqrestore(&mtk_dp->irq_thread_lock, flags);

drivers/gpu/drm/mediatek/mtk_dp.c

2054

if (!!(mtk_dp_read(mtk_dp, MTK_DP_TRANS_P0_3414) &

drivers/gpu/drm/mediatek/mtk_dp.c

2056

mtk_dp->train_info.cable_plugged_in = true;

drivers/gpu/drm/mediatek/mtk_dp.c

2058

mtk_dp->train_info.cable_plugged_in = false;

drivers/gpu/drm/mediatek/mtk_dp.c

2066

struct mtk_dp *mtk_dp = container_of(mtk_aux, struct mtk_dp, aux);

drivers/gpu/drm/mediatek/mtk_dp.c

2070

ret = regmap_read_poll_timeout(mtk_dp->regs, MTK_DP_TRANS_P0_3414,

drivers/gpu/drm/mediatek/mtk_dp.c

2074

mtk_dp->train_info.cable_plugged_in = false;

drivers/gpu/drm/mediatek/mtk_dp.c

2078

mtk_dp->train_info.cable_plugged_in = true;

drivers/gpu/drm/mediatek/mtk_dp.c

2080

ret = mtk_dp_parse_capabilities(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2082

dev_err(mtk_dp->dev, "Can't parse capabilities: %d\n", ret);

drivers/gpu/drm/mediatek/mtk_dp.c

2089

static int mtk_dp_dt_parse(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

2103

mtk_dp->regs = devm_regmap_init_mmio(dev, base, &mtk_dp_regmap_config);

drivers/gpu/drm/mediatek/mtk_dp.c

2104

if (IS_ERR(mtk_dp->regs))

drivers/gpu/drm/mediatek/mtk_dp.c

2105

return PTR_ERR(mtk_dp->regs);

drivers/gpu/drm/mediatek/mtk_dp.c

2116

mtk_dp->max_lanes = len;

drivers/gpu/drm/mediatek/mtk_dp.c

2124

mtk_dp->max_linkrate = drm_dp_link_rate_to_bw_code(linkrate * 100);

drivers/gpu/drm/mediatek/mtk_dp.c

2129

static void mtk_dp_update_plugged_status(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

2131

if (!mtk_dp->data->audio_supported || !mtk_dp->audio_enable)

drivers/gpu/drm/mediatek/mtk_dp.c

2134

mutex_lock(&mtk_dp->update_plugged_status_lock);

drivers/gpu/drm/mediatek/mtk_dp.c

2135

if (mtk_dp->plugged_cb && mtk_dp->codec_dev)

drivers/gpu/drm/mediatek/mtk_dp.c

2136

mtk_dp->plugged_cb(mtk_dp->codec_dev,

drivers/gpu/drm/mediatek/mtk_dp.c

2137

mtk_dp->enabled &

drivers/gpu/drm/mediatek/mtk_dp.c

2138

mtk_dp->info.audio_cur_cfg.detect_monitor);

drivers/gpu/drm/mediatek/mtk_dp.c

2139

mutex_unlock(&mtk_dp->update_plugged_status_lock);

drivers/gpu/drm/mediatek/mtk_dp.c

2145

struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2147

bool enabled = mtk_dp->enabled;

drivers/gpu/drm/mediatek/mtk_dp.c

2149

if (!mtk_dp->train_info.cable_plugged_in)

drivers/gpu/drm/mediatek/mtk_dp.c

2153

mtk_dp_aux_panel_poweron(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

2163

if (drm_dp_read_sink_count(&mtk_dp->aux) > 0)

drivers/gpu/drm/mediatek/mtk_dp.c

2167

mtk_dp_aux_panel_poweron(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

2175

struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2176

bool enabled = mtk_dp->enabled;

drivers/gpu/drm/mediatek/mtk_dp.c

2178

struct mtk_dp_audio_cfg *audio_caps = &mtk_dp->info.audio_cur_cfg;

drivers/gpu/drm/mediatek/mtk_dp.c

2182

mtk_dp_aux_panel_poweron(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

2185

drm_edid = drm_edid_read_ddc(connector, &mtk_dp->aux.ddc);

drivers/gpu/drm/mediatek/mtk_dp.c

2191

if (mtk_dp->bridge.type == DRM_MODE_CONNECTOR_eDP &&

drivers/gpu/drm/mediatek/mtk_dp.c

2192

mtk_dp_parse_capabilities(mtk_dp)) {

drivers/gpu/drm/mediatek/mtk_dp.c

2193

drm_err(mtk_dp->drm_dev, "Can't parse capabilities\n");

drivers/gpu/drm/mediatek/mtk_dp.c

2223

mtk_dp_aux_panel_poweron(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

2233

struct mtk_dp *mtk_dp = container_of(mtk_aux, struct mtk_dp, aux);

drivers/gpu/drm/mediatek/mtk_dp.c

2239

if (mtk_dp->bridge.type != DRM_MODE_CONNECTOR_eDP &&

drivers/gpu/drm/mediatek/mtk_dp.c

2240

!mtk_dp->train_info.cable_plugged_in) {

drivers/gpu/drm/mediatek/mtk_dp.c

2261

dev_err(mtk_dp->dev, "invalid aux cmd = %d\n",

drivers/gpu/drm/mediatek/mtk_dp.c

2271

ret = mtk_dp_aux_do_transfer(mtk_dp, is_read, request,

drivers/gpu/drm/mediatek/mtk_dp.c

2277

dev_info(mtk_dp->dev,

drivers/gpu/drm/mediatek/mtk_dp.c

2290

static int mtk_dp_poweron(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

2294

ret = phy_init(mtk_dp->phy);

drivers/gpu/drm/mediatek/mtk_dp.c

2296

dev_err(mtk_dp->dev, "Failed to initialize phy: %d\n", ret);

drivers/gpu/drm/mediatek/mtk_dp.c

2300

mtk_dp_init_port(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2301

mtk_dp_power_enable(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2306

static void mtk_dp_poweroff(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

2308

mtk_dp_power_disable(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2309

phy_exit(mtk_dp->phy);

drivers/gpu/drm/mediatek/mtk_dp.c

2316

struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2320

dev_err(mtk_dp->dev, "Driver does not provide a connector!");

drivers/gpu/drm/mediatek/mtk_dp.c

2324

mtk_dp->aux.drm_dev = bridge->dev;

drivers/gpu/drm/mediatek/mtk_dp.c

2325

ret = drm_dp_aux_register(&mtk_dp->aux);

drivers/gpu/drm/mediatek/mtk_dp.c

2327

dev_err(mtk_dp->dev,

drivers/gpu/drm/mediatek/mtk_dp.c

2332

ret = mtk_dp_poweron(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2336

if (mtk_dp->next_bridge) {

drivers/gpu/drm/mediatek/mtk_dp.c

2337

ret = drm_bridge_attach(encoder, mtk_dp->next_bridge,

drivers/gpu/drm/mediatek/mtk_dp.c

2338

&mtk_dp->bridge, flags);

drivers/gpu/drm/mediatek/mtk_dp.c

2340

drm_warn(mtk_dp->drm_dev,

drivers/gpu/drm/mediatek/mtk_dp.c

2346

mtk_dp->drm_dev = bridge->dev;

drivers/gpu/drm/mediatek/mtk_dp.c

2348

if (mtk_dp->bridge.type != DRM_MODE_CONNECTOR_eDP) {

drivers/gpu/drm/mediatek/mtk_dp.c

2349

irq_clear_status_flags(mtk_dp->irq, IRQ_NOAUTOEN);

drivers/gpu/drm/mediatek/mtk_dp.c

2350

enable_irq(mtk_dp->irq);

drivers/gpu/drm/mediatek/mtk_dp.c

2351

mtk_dp_hwirq_enable(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

2357

mtk_dp_poweroff(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2359

drm_dp_aux_unregister(&mtk_dp->aux);

drivers/gpu/drm/mediatek/mtk_dp.c

2365

struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2367

if (mtk_dp->bridge.type != DRM_MODE_CONNECTOR_eDP) {

drivers/gpu/drm/mediatek/mtk_dp.c

2368

mtk_dp_hwirq_enable(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

2369

disable_irq(mtk_dp->irq);

drivers/gpu/drm/mediatek/mtk_dp.c

2371

mtk_dp->drm_dev = NULL;

drivers/gpu/drm/mediatek/mtk_dp.c

2372

mtk_dp_poweroff(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2373

drm_dp_aux_unregister(&mtk_dp->aux);

drivers/gpu/drm/mediatek/mtk_dp.c

2379

struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2382

mtk_dp->conn = drm_atomic_get_new_connector_for_encoder(state,

drivers/gpu/drm/mediatek/mtk_dp.c

2384

if (!mtk_dp->conn) {

drivers/gpu/drm/mediatek/mtk_dp.c

2385

drm_err(mtk_dp->drm_dev,

drivers/gpu/drm/mediatek/mtk_dp.c

2390

if (mtk_dp->data->bridge_type == DRM_MODE_CONNECTOR_eDP) {

drivers/gpu/drm/mediatek/mtk_dp.c

2391

mtk_dp_aux_panel_poweron(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

2394

ret = mtk_dp_training(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2396

drm_err(mtk_dp->drm_dev, "Training failed, %d\n", ret);

drivers/gpu/drm/mediatek/mtk_dp.c

2401

ret = mtk_dp_video_config(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2405

mtk_dp_video_enable(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

2407

mtk_dp->audio_enable =

drivers/gpu/drm/mediatek/mtk_dp.c

2408

mtk_dp_edid_parse_audio_capabilities(mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

2409

&mtk_dp->info.audio_cur_cfg);

drivers/gpu/drm/mediatek/mtk_dp.c

2410

if (mtk_dp->audio_enable) {

drivers/gpu/drm/mediatek/mtk_dp.c

2411

mtk_dp_audio_setup(mtk_dp, &mtk_dp->info.audio_cur_cfg);

drivers/gpu/drm/mediatek/mtk_dp.c

2412

mtk_dp_audio_mute(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

2414

memset(&mtk_dp->info.audio_cur_cfg, 0,

drivers/gpu/drm/mediatek/mtk_dp.c

2415

sizeof(mtk_dp->info.audio_cur_cfg));

drivers/gpu/drm/mediatek/mtk_dp.c

2418

if (mtk_dp->data->bridge_type == DRM_MODE_CONNECTOR_eDP)

drivers/gpu/drm/mediatek/mtk_dp.c

2419

mtk_dp->enabled = true;

drivers/gpu/drm/mediatek/mtk_dp.c

2421

mtk_dp_update_plugged_status(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2425

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,

drivers/gpu/drm/mediatek/mtk_dp.c

2433

struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2435

if (mtk_dp->data->bridge_type == DRM_MODE_CONNECTOR_eDP) {

drivers/gpu/drm/mediatek/mtk_dp.c

2436

mtk_dp->enabled = false;

drivers/gpu/drm/mediatek/mtk_dp.c

2437

mtk_dp_aux_panel_poweron(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

2440

mtk_dp_update_plugged_status(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2441

mtk_dp_video_enable(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

2442

mtk_dp_audio_mute(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

2445

mtk_dp_sdp_path_reset(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2456

struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2458

u32 lane_count_min = mtk_dp->train_info.lane_count;

drivers/gpu/drm/mediatek/mtk_dp.c

2459

u32 rate = drm_dp_bw_code_to_link_rate(mtk_dp->train_info.link_rate) *

drivers/gpu/drm/mediatek/mtk_dp.c

2507

struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2511

u32 lane_count_min = mtk_dp->train_info.lane_count;

drivers/gpu/drm/mediatek/mtk_dp.c

2512

u32 rate = drm_dp_bw_code_to_link_rate(mtk_dp->train_info.link_rate) *

drivers/gpu/drm/mediatek/mtk_dp.c

2549

struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2555

dev_dbg(mtk_dp->dev, "input format 0x%04x, output format 0x%04x\n",

drivers/gpu/drm/mediatek/mtk_dp.c

2560

mtk_dp->info.format = DP_PIXELFORMAT_YUV422;

drivers/gpu/drm/mediatek/mtk_dp.c

2562

mtk_dp->info.format = DP_PIXELFORMAT_RGB;

drivers/gpu/drm/mediatek/mtk_dp.c

2565

drm_err(mtk_dp->drm_dev,

drivers/gpu/drm/mediatek/mtk_dp.c

2570

drm_display_mode_to_videomode(&crtc_state->adjusted_mode, &mtk_dp->info.vm);

drivers/gpu/drm/mediatek/mtk_dp.c

2593

struct mtk_dp *mtk_dp = timer_container_of(mtk_dp, t, debounce_timer);

drivers/gpu/drm/mediatek/mtk_dp.c

2595

mtk_dp->need_debounce = true;

drivers/gpu/drm/mediatek/mtk_dp.c

2605

struct mtk_dp *mtk_dp = dev_get_drvdata(dev);

drivers/gpu/drm/mediatek/mtk_dp.c

2607

if (!mtk_dp->enabled) {

drivers/gpu/drm/mediatek/mtk_dp.c

2608

dev_err(mtk_dp->dev, "%s, DP is not ready!\n", __func__);

drivers/gpu/drm/mediatek/mtk_dp.c

2612

mtk_dp->info.audio_cur_cfg.channels = params->cea.channels;

drivers/gpu/drm/mediatek/mtk_dp.c

2613

mtk_dp->info.audio_cur_cfg.sample_rate = params->sample_rate;

drivers/gpu/drm/mediatek/mtk_dp.c

2615

mtk_dp_audio_setup(mtk_dp, &mtk_dp->info.audio_cur_cfg);

drivers/gpu/drm/mediatek/mtk_dp.c

2622

struct mtk_dp *mtk_dp = dev_get_drvdata(dev);

drivers/gpu/drm/mediatek/mtk_dp.c

2624

mtk_dp_audio_mute(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

2631

struct mtk_dp *mtk_dp = dev_get_drvdata(dev);

drivers/gpu/drm/mediatek/mtk_dp.c

2633

mtk_dp_audio_mute(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

2639

struct mtk_dp *mtk_dp = dev_get_drvdata(dev);

drivers/gpu/drm/mediatek/mtk_dp.c

2641

if (mtk_dp->enabled)

drivers/gpu/drm/mediatek/mtk_dp.c

2642

memcpy(buf, mtk_dp->conn->eld, len);

drivers/gpu/drm/mediatek/mtk_dp.c

2653

struct mtk_dp *mtk_dp = data;

drivers/gpu/drm/mediatek/mtk_dp.c

2655

mutex_lock(&mtk_dp->update_plugged_status_lock);

drivers/gpu/drm/mediatek/mtk_dp.c

2656

mtk_dp->plugged_cb = fn;

drivers/gpu/drm/mediatek/mtk_dp.c

2657

mtk_dp->codec_dev = codec_dev;

drivers/gpu/drm/mediatek/mtk_dp.c

2658

mutex_unlock(&mtk_dp->update_plugged_status_lock);

drivers/gpu/drm/mediatek/mtk_dp.c

2660

mtk_dp_update_plugged_status(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2675

struct mtk_dp *mtk_dp = dev_get_drvdata(dev);

drivers/gpu/drm/mediatek/mtk_dp.c

2680

.data = mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

2684

mtk_dp->audio_pdev = platform_device_register_data(dev,

drivers/gpu/drm/mediatek/mtk_dp.c

2689

return PTR_ERR_OR_ZERO(mtk_dp->audio_pdev);

drivers/gpu/drm/mediatek/mtk_dp.c

2692

static int mtk_dp_register_phy(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

2694

struct device *dev = mtk_dp->dev;

drivers/gpu/drm/mediatek/mtk_dp.c

2696

mtk_dp->phy_dev = platform_device_register_data(dev, "mediatek-dp-phy",

drivers/gpu/drm/mediatek/mtk_dp.c

2698

&mtk_dp->regs,

drivers/gpu/drm/mediatek/mtk_dp.c

2700

if (IS_ERR(mtk_dp->phy_dev))

drivers/gpu/drm/mediatek/mtk_dp.c

2701

return dev_err_probe(dev, PTR_ERR(mtk_dp->phy_dev),

drivers/gpu/drm/mediatek/mtk_dp.c

2704

mtk_dp_get_calibration_data(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2706

mtk_dp->phy = devm_phy_get(&mtk_dp->phy_dev->dev, "dp");

drivers/gpu/drm/mediatek/mtk_dp.c

2707

if (IS_ERR(mtk_dp->phy)) {

drivers/gpu/drm/mediatek/mtk_dp.c

2708

platform_device_unregister(mtk_dp->phy_dev);

drivers/gpu/drm/mediatek/mtk_dp.c

2709

return dev_err_probe(dev, PTR_ERR(mtk_dp->phy), "Failed to get phy\n");

drivers/gpu/drm/mediatek/mtk_dp.c

2717

struct mtk_dp *mtk_dp = container_of(mtk_aux, struct mtk_dp, aux);

drivers/gpu/drm/mediatek/mtk_dp.c

2721

mtk_dp->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 1, 0);

drivers/gpu/drm/mediatek/mtk_dp.c

2724

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,

drivers/gpu/drm/mediatek/mtk_dp.c

2727

mtk_dp_power_disable(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2729

if (IS_ERR(mtk_dp->next_bridge)) {

drivers/gpu/drm/mediatek/mtk_dp.c

2730

ret = PTR_ERR(mtk_dp->next_bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2731

mtk_dp->next_bridge = NULL;

drivers/gpu/drm/mediatek/mtk_dp.c

2736

ret = devm_drm_bridge_add(dev, &mtk_dp->bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2745

struct mtk_dp *mtk_dp;

drivers/gpu/drm/mediatek/mtk_dp.c

2749

mtk_dp = devm_drm_bridge_alloc(dev, struct mtk_dp, bridge,

drivers/gpu/drm/mediatek/mtk_dp.c

2751

if (IS_ERR(mtk_dp))

drivers/gpu/drm/mediatek/mtk_dp.c

2752

return PTR_ERR(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2754

mtk_dp->dev = dev;

drivers/gpu/drm/mediatek/mtk_dp.c

2755

mtk_dp->data = (struct mtk_dp_data *)of_device_get_match_data(dev);

drivers/gpu/drm/mediatek/mtk_dp.c

2757

ret = mtk_dp_dt_parse(mtk_dp, pdev);

drivers/gpu/drm/mediatek/mtk_dp.c

2768

if (mtk_dp->data->bridge_type != DRM_MODE_CONNECTOR_eDP) {

drivers/gpu/drm/mediatek/mtk_dp.c

2769

mtk_dp->irq = platform_get_irq(pdev, 0);

drivers/gpu/drm/mediatek/mtk_dp.c

2770

if (mtk_dp->irq < 0)

drivers/gpu/drm/mediatek/mtk_dp.c

2771

return dev_err_probe(dev, mtk_dp->irq,

drivers/gpu/drm/mediatek/mtk_dp.c

2774

spin_lock_init(&mtk_dp->irq_thread_lock);

drivers/gpu/drm/mediatek/mtk_dp.c

2776

irq_set_status_flags(mtk_dp->irq, IRQ_NOAUTOEN);

drivers/gpu/drm/mediatek/mtk_dp.c

2777

ret = devm_request_threaded_irq(dev, mtk_dp->irq, mtk_dp_hpd_event,

drivers/gpu/drm/mediatek/mtk_dp.c

2780

mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2785

mtk_dp->need_debounce = true;

drivers/gpu/drm/mediatek/mtk_dp.c

2786

timer_setup(&mtk_dp->debounce_timer, mtk_dp_debounce_timer, 0);

drivers/gpu/drm/mediatek/mtk_dp.c

2789

mtk_dp->aux.name = "aux_mtk_dp";

drivers/gpu/drm/mediatek/mtk_dp.c

2790

mtk_dp->aux.dev = dev;

drivers/gpu/drm/mediatek/mtk_dp.c

2791

mtk_dp->aux.transfer = mtk_dp_aux_transfer;

drivers/gpu/drm/mediatek/mtk_dp.c

2792

mtk_dp->aux.wait_hpd_asserted = mtk_dp_wait_hpd_asserted;

drivers/gpu/drm/mediatek/mtk_dp.c

2793

drm_dp_aux_init(&mtk_dp->aux);

drivers/gpu/drm/mediatek/mtk_dp.c

2795

platform_set_drvdata(pdev, mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2797

if (mtk_dp->data->audio_supported) {

drivers/gpu/drm/mediatek/mtk_dp.c

2798

mutex_init(&mtk_dp->update_plugged_status_lock);

drivers/gpu/drm/mediatek/mtk_dp.c

2806

ret = mtk_dp_register_phy(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2810

mtk_dp->bridge.of_node = dev->of_node;

drivers/gpu/drm/mediatek/mtk_dp.c

2811

mtk_dp->bridge.type = mtk_dp->data->bridge_type;

drivers/gpu/drm/mediatek/mtk_dp.c

2813

if (mtk_dp->bridge.type == DRM_MODE_CONNECTOR_eDP) {

drivers/gpu/drm/mediatek/mtk_dp.c

2819

mtk_dp_set_idle_pattern(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

2820

mtk_dp_initialize_aux_settings(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2821

mtk_dp_power_enable(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2824

mtk_dp_hwirq_enable(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

2832

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,

drivers/gpu/drm/mediatek/mtk_dp.c

2836

ret = devm_of_dp_aux_populate_bus(&mtk_dp->aux, mtk_dp_edp_link_panel);

drivers/gpu/drm/mediatek/mtk_dp.c

2840

ret = mtk_dp_edp_link_panel(&mtk_dp->aux);

drivers/gpu/drm/mediatek/mtk_dp.c

2844

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,

drivers/gpu/drm/mediatek/mtk_dp.c

2847

mtk_dp_power_disable(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2852

mtk_dp->bridge.ops = DRM_BRIDGE_OP_DETECT |

drivers/gpu/drm/mediatek/mtk_dp.c

2854

ret = devm_drm_bridge_add(dev, &mtk_dp->bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

2867

struct mtk_dp *mtk_dp = platform_get_drvdata(pdev);

drivers/gpu/drm/mediatek/mtk_dp.c

2871

if (mtk_dp->data->bridge_type != DRM_MODE_CONNECTOR_eDP)

drivers/gpu/drm/mediatek/mtk_dp.c

2872

timer_delete_sync(&mtk_dp->debounce_timer);

drivers/gpu/drm/mediatek/mtk_dp.c

2873

platform_device_unregister(mtk_dp->phy_dev);

drivers/gpu/drm/mediatek/mtk_dp.c

2874

if (mtk_dp->audio_pdev)

drivers/gpu/drm/mediatek/mtk_dp.c

2875

platform_device_unregister(mtk_dp->audio_pdev);

drivers/gpu/drm/mediatek/mtk_dp.c

2881

struct mtk_dp *mtk_dp = dev_get_drvdata(dev);

drivers/gpu/drm/mediatek/mtk_dp.c

2883

mtk_dp_power_disable(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2884

if (mtk_dp->bridge.type != DRM_MODE_CONNECTOR_eDP)

drivers/gpu/drm/mediatek/mtk_dp.c

2885

mtk_dp_hwirq_enable(mtk_dp, false);

drivers/gpu/drm/mediatek/mtk_dp.c

2893

struct mtk_dp *mtk_dp = dev_get_drvdata(dev);

drivers/gpu/drm/mediatek/mtk_dp.c

2896

mtk_dp_init_port(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

2897

if (mtk_dp->bridge.type != DRM_MODE_CONNECTOR_eDP)

drivers/gpu/drm/mediatek/mtk_dp.c

2898

mtk_dp_hwirq_enable(mtk_dp, true);

drivers/gpu/drm/mediatek/mtk_dp.c

2899

mtk_dp_power_enable(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

405

static struct mtk_dp *mtk_dp_from_bridge(struct drm_bridge *b)

drivers/gpu/drm/mediatek/mtk_dp.c

407

return container_of(b, struct mtk_dp, bridge);

drivers/gpu/drm/mediatek/mtk_dp.c

410

static u32 mtk_dp_read(struct mtk_dp *mtk_dp, u32 offset)

drivers/gpu/drm/mediatek/mtk_dp.c

415

ret = regmap_read(mtk_dp->regs, offset, &read_val);

drivers/gpu/drm/mediatek/mtk_dp.c

417

dev_err(mtk_dp->dev, "Failed to read register 0x%x: %d\n",

drivers/gpu/drm/mediatek/mtk_dp.c

425

static int mtk_dp_write(struct mtk_dp *mtk_dp, u32 offset, u32 val)

drivers/gpu/drm/mediatek/mtk_dp.c

427

int ret = regmap_write(mtk_dp->regs, offset, val);

drivers/gpu/drm/mediatek/mtk_dp.c

430

dev_err(mtk_dp->dev,

drivers/gpu/drm/mediatek/mtk_dp.c

436

static int mtk_dp_update_bits(struct mtk_dp *mtk_dp, u32 offset,

drivers/gpu/drm/mediatek/mtk_dp.c

439

int ret = regmap_update_bits(mtk_dp->regs, offset, mask, val);

drivers/gpu/drm/mediatek/mtk_dp.c

442

dev_err(mtk_dp->dev,

drivers/gpu/drm/mediatek/mtk_dp.c

448

static void mtk_dp_bulk_16bit_write(struct mtk_dp *mtk_dp, u32 offset, u8 *buf,

drivers/gpu/drm/mediatek/mtk_dp.c

457

if (mtk_dp_write(mtk_dp, offset + i * 2, val))

drivers/gpu/drm/mediatek/mtk_dp.c

462

static void mtk_dp_msa_bypass_enable(struct mtk_dp *mtk_dp, bool enable)

drivers/gpu/drm/mediatek/mtk_dp.c

470

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3030, enable ? 0 : mask, mask);

drivers/gpu/drm/mediatek/mtk_dp.c

473

static void mtk_dp_set_msa(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

476

struct videomode *vm = &mtk_dp->info.vm;

drivers/gpu/drm/mediatek/mtk_dp.c

481

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3010,

drivers/gpu/drm/mediatek/mtk_dp.c

483

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3018,

drivers/gpu/drm/mediatek/mtk_dp.c

486

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3028,

drivers/gpu/drm/mediatek/mtk_dp.c

488

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3028,

drivers/gpu/drm/mediatek/mtk_dp.c

490

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3020,

drivers/gpu/drm/mediatek/mtk_dp.c

494

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3014,

drivers/gpu/drm/mediatek/mtk_dp.c

496

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_301C,

drivers/gpu/drm/mediatek/mtk_dp.c

499

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_302C,

drivers/gpu/drm/mediatek/mtk_dp.c

501

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_302C,

drivers/gpu/drm/mediatek/mtk_dp.c

503

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3024,

drivers/gpu/drm/mediatek/mtk_dp.c

507

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3064,

drivers/gpu/drm/mediatek/mtk_dp.c

509

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3154,

drivers/gpu/drm/mediatek/mtk_dp.c

511

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3158,

drivers/gpu/drm/mediatek/mtk_dp.c

514

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_315C,

drivers/gpu/drm/mediatek/mtk_dp.c

517

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3160,

drivers/gpu/drm/mediatek/mtk_dp.c

520

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3164,

drivers/gpu/drm/mediatek/mtk_dp.c

525

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3168,

drivers/gpu/drm/mediatek/mtk_dp.c

528

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_316C,

drivers/gpu/drm/mediatek/mtk_dp.c

531

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3170,

drivers/gpu/drm/mediatek/mtk_dp.c

534

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3174,

drivers/gpu/drm/mediatek/mtk_dp.c

537

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3178,

drivers/gpu/drm/mediatek/mtk_dp.c

542

static int mtk_dp_set_color_format(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

558

drm_warn(mtk_dp->drm_dev, "Unsupported color format: %d\n",

drivers/gpu/drm/mediatek/mtk_dp.c

564

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3034,

drivers/gpu/drm/mediatek/mtk_dp.c

568

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_303C,

drivers/gpu/drm/mediatek/mtk_dp.c

573

static void mtk_dp_set_color_depth(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

577

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3034,

drivers/gpu/drm/mediatek/mtk_dp.c

580

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_303C,

drivers/gpu/drm/mediatek/mtk_dp.c

585

static void mtk_dp_config_mn_mode(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

588

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3004,

drivers/gpu/drm/mediatek/mtk_dp.c

592

static void mtk_dp_set_sram_read_start(struct mtk_dp *mtk_dp, u32 val)

drivers/gpu/drm/mediatek/mtk_dp.c

594

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_303C,

drivers/gpu/drm/mediatek/mtk_dp.c

598

static void mtk_dp_setup_encoder(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

600

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_303C,

drivers/gpu/drm/mediatek/mtk_dp.c

603

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3040,

drivers/gpu/drm/mediatek/mtk_dp.c

606

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3364,

drivers/gpu/drm/mediatek/mtk_dp.c

609

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3300,

drivers/gpu/drm/mediatek/mtk_dp.c

612

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3364,

drivers/gpu/drm/mediatek/mtk_dp.c

615

mtk_dp_write(mtk_dp, MTK_DP_ENC1_P0_3368, DP_ENC1_P0_3368_VAL);

drivers/gpu/drm/mediatek/mtk_dp.c

618

static void mtk_dp_pg_enable(struct mtk_dp *mtk_dp, bool enable)

drivers/gpu/drm/mediatek/mtk_dp.c

620

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3038,

drivers/gpu/drm/mediatek/mtk_dp.c

623

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_31B0,

drivers/gpu/drm/mediatek/mtk_dp.c

627

static void mtk_dp_audio_setup_channels(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

632

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3324,

drivers/gpu/drm/mediatek/mtk_dp.c

637

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_33F4,

drivers/gpu/drm/mediatek/mtk_dp.c

639

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3304,

drivers/gpu/drm/mediatek/mtk_dp.c

658

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3088,

drivers/gpu/drm/mediatek/mtk_dp.c

667

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_33F4, 0, DP_ENC_DUMMY_RW_1);

drivers/gpu/drm/mediatek/mtk_dp.c

670

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_33F4,

drivers/gpu/drm/mediatek/mtk_dp.c

675

static void mtk_dp_audio_channel_status_set(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

721

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_308C,

drivers/gpu/drm/mediatek/mtk_dp.c

723

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3090,

drivers/gpu/drm/mediatek/mtk_dp.c

725

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_3094,

drivers/gpu/drm/mediatek/mtk_dp.c

729

static void mtk_dp_audio_sdp_asp_set_channels(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

732

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_312C,

drivers/gpu/drm/mediatek/mtk_dp.c

737

static void mtk_dp_audio_set_divider(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

739

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_30BC,

drivers/gpu/drm/mediatek/mtk_dp.c

740

mtk_dp->data->audio_m_div2_bit,

drivers/gpu/drm/mediatek/mtk_dp.c

744

static void mtk_dp_sdp_trigger_aui(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

746

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3280,

drivers/gpu/drm/mediatek/mtk_dp.c

748

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3280,

drivers/gpu/drm/mediatek/mtk_dp.c

752

static void mtk_dp_sdp_set_data(struct mtk_dp *mtk_dp, u8 *data_bytes)

drivers/gpu/drm/mediatek/mtk_dp.c

754

mtk_dp_bulk_16bit_write(mtk_dp, MTK_DP_ENC1_P0_3200,

drivers/gpu/drm/mediatek/mtk_dp.c

758

static void mtk_dp_sdp_set_header_aui(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

763

mtk_dp_bulk_16bit_write(mtk_dp, db_addr, (u8 *)header, 4);

drivers/gpu/drm/mediatek/mtk_dp.c

766

static void mtk_dp_disable_sdp_aui(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

769

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_30A8 & 0xfffc, 0,

drivers/gpu/drm/mediatek/mtk_dp.c

773

static void mtk_dp_setup_sdp_aui(struct mtk_dp *mtk_dp,

drivers/gpu/drm/mediatek/mtk_dp.c

778

mtk_dp_sdp_set_data(mtk_dp, sdp->db);

drivers/gpu/drm/mediatek/mtk_dp.c

779

mtk_dp_sdp_set_header_aui(mtk_dp, &sdp->sdp_header);

drivers/gpu/drm/mediatek/mtk_dp.c

780

mtk_dp_disable_sdp_aui(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

784

mtk_dp_sdp_trigger_aui(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

786

mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_30A8 & 0xfffc,

drivers/gpu/drm/mediatek/mtk_dp.c

790

static void mtk_dp_aux_irq_clear(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

792

mtk_dp_write(mtk_dp, MTK_DP_AUX_P0_3640, DP_AUX_P0_3640_VAL);

drivers/gpu/drm/mediatek/mtk_dp.c

795

static void mtk_dp_aux_set_cmd(struct mtk_dp *mtk_dp, u8 cmd, u32 addr)

drivers/gpu/drm/mediatek/mtk_dp.c

797

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3644,

drivers/gpu/drm/mediatek/mtk_dp.c

799

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3648,

drivers/gpu/drm/mediatek/mtk_dp.c

801

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_364C,

drivers/gpu/drm/mediatek/mtk_dp.c

805

static void mtk_dp_aux_clear_fifo(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

807

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3650,

drivers/gpu/drm/mediatek/mtk_dp.c

814

static void mtk_dp_aux_request_ready(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

816

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3630,

drivers/gpu/drm/mediatek/mtk_dp.c

821

static void mtk_dp_aux_fill_write_fifo(struct mtk_dp *mtk_dp, u8 *buf,

drivers/gpu/drm/mediatek/mtk_dp.c

824

mtk_dp_bulk_16bit_write(mtk_dp, MTK_DP_AUX_P0_3708, buf, length);

drivers/gpu/drm/mediatek/mtk_dp.c

827

static void mtk_dp_aux_read_rx_fifo(struct mtk_dp *mtk_dp, u8 *buf,

drivers/gpu/drm/mediatek/mtk_dp.c

832

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3620,

drivers/gpu/drm/mediatek/mtk_dp.c

836

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3620,

drivers/gpu/drm/mediatek/mtk_dp.c

842

buf[read_pos] = (u8)(mtk_dp_read(mtk_dp, MTK_DP_AUX_P0_3620) &

drivers/gpu/drm/mediatek/mtk_dp.c

847

static void mtk_dp_aux_set_length(struct mtk_dp *mtk_dp, size_t length)

drivers/gpu/drm/mediatek/mtk_dp.c

850

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3650,

drivers/gpu/drm/mediatek/mtk_dp.c

853

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_362C,

drivers/gpu/drm/mediatek/mtk_dp.c

859

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_362C,

drivers/gpu/drm/mediatek/mtk_dp.c

867

static int mtk_dp_aux_wait_for_completion(struct mtk_dp *mtk_dp, bool is_read)

drivers/gpu/drm/mediatek/mtk_dp.c

875

u32 fifo_status = mtk_dp_read(mtk_dp, MTK_DP_AUX_P0_3618);

drivers/gpu/drm/mediatek/mtk_dp.c

884

aux_irq_status = mtk_dp_read(mtk_dp, MTK_DP_AUX_P0_3640);

drivers/gpu/drm/mediatek/mtk_dp.c

898

static int mtk_dp_aux_do_transfer(struct mtk_dp *mtk_dp, bool is_read, u8 cmd,

drivers/gpu/drm/mediatek/mtk_dp.c

908

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3704,

drivers/gpu/drm/mediatek/mtk_dp.c

913

mtk_dp_aux_clear_fifo(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

914

mtk_dp_aux_irq_clear(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

916

mtk_dp_aux_set_cmd(mtk_dp, cmd, addr);

drivers/gpu/drm/mediatek/mtk_dp.c

917

mtk_dp_aux_set_length(mtk_dp, length);

drivers/gpu/drm/mediatek/mtk_dp.c

921

mtk_dp_aux_fill_write_fifo(mtk_dp, buf, length);

drivers/gpu/drm/mediatek/mtk_dp.c

923

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3704,

drivers/gpu/drm/mediatek/mtk_dp.c

928

mtk_dp_aux_request_ready(mtk_dp);

drivers/gpu/drm/mediatek/mtk_dp.c

931

ret = mtk_dp_aux_wait_for_completion(mtk_dp, is_read);

drivers/gpu/drm/mediatek/mtk_dp.c

933

*reply_cmd = mtk_dp_read(mtk_dp, MTK_DP_AUX_P0_3624) &

drivers/gpu/drm/mediatek/mtk_dp.c

937

u32 phy_status = mtk_dp_read(mtk_dp, MTK_DP_AUX_P0_3628) &

drivers/gpu/drm/mediatek/mtk_dp.c

940

dev_err(mtk_dp->dev,

drivers/gpu/drm/mediatek/mtk_dp.c

949

mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_362C,

drivers/gpu/drm/mediatek/mtk_dp.c

963

mtk_dp_aux_read_rx_fifo(mtk_dp, buf, length, read_delay);

drivers/gpu/drm/mediatek/mtk_dp.c

969

static void mtk_dp_set_swing_pre_emphasis(struct mtk_dp *mtk_dp, int lane_num,

drivers/gpu/drm/mediatek/mtk_dp.c

974

dev_dbg(mtk_dp->dev,

drivers/gpu/drm/mediatek/mtk_dp.c

978

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_SWING_EMP,

drivers/gpu/drm/mediatek/mtk_dp.c

981

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_SWING_EMP,

drivers/gpu/drm/mediatek/mtk_dp.c

986

static void mtk_dp_reset_swing_pre_emphasis(struct mtk_dp *mtk_dp)

drivers/gpu/drm/mediatek/mtk_dp.c

988

mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_SWING_EMP,