drivers/net/ethernet/marvell/mvpp2/mvpp2.h

1535

void mvpp2_write(struct mvpp2 *priv, u32 offset, u32 data);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

1072

mvpp2_write(port->priv, MVPP2_CLS_OVERSIZE_RXQ_LOW_REG(port->id),

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

1075

mvpp2_write(port->priv, MVPP2_CLS_SWFWD_P2HQ_REG(port->id),

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

1080

mvpp2_write(port->priv, MVPP2_CLS_SWFWD_PCTRL_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

1485

mvpp2_write(priv, MVPP22_RSS_INDEX, sel);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

1487

mvpp2_write(priv, MVPP22_RSS_TABLE_ENTRY,

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

1515

mvpp2_write(priv, MVPP22_RSS_INDEX, MVPP22_RSS_INDEX_TABLE(ctx));

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

1516

mvpp2_write(priv, MVPP22_RSS_WIDTH, 8);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

1518

mvpp2_write(priv, MVPP22_RSS_INDEX, MVPP22_RSS_INDEX_QUEUE(ctx));

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

1519

mvpp2_write(priv, MVPP22_RXQ2RSS_TABLE, MVPP22_RSS_TABLE_POINTER(ctx));

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

333

mvpp2_write(priv, MVPP2_CTRS_IDX, index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

342

mvpp2_write(priv, MVPP2_CLS_FLOW_INDEX_REG, index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

352

mvpp2_write(priv, MVPP2_CLS_FLOW_INDEX_REG, fe->index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

353

mvpp2_write(priv, MVPP2_CLS_FLOW_TBL0_REG, fe->data[0]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

354

mvpp2_write(priv, MVPP2_CLS_FLOW_TBL1_REG, fe->data[1]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

355

mvpp2_write(priv, MVPP2_CLS_FLOW_TBL2_REG, fe->data[2]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

360

mvpp2_write(priv, MVPP2_CTRS_IDX, index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

371

mvpp2_write(priv, MVPP2_CLS_LKP_INDEX_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

384

mvpp2_write(priv, MVPP2_CLS_LKP_INDEX_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

385

mvpp2_write(priv, MVPP2_CLS_LKP_TBL_REG, le->data);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

505

mvpp2_write(priv, MVPP22_CLS_C2_TCAM_IDX, c2->index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

512

mvpp2_write(priv, MVPP22_CLS_C2_TCAM_INV, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

514

mvpp2_write(priv, MVPP22_CLS_C2_ACT, c2->act);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

516

mvpp2_write(priv, MVPP22_CLS_C2_ATTR0, c2->attr[0]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

517

mvpp2_write(priv, MVPP22_CLS_C2_ATTR1, c2->attr[1]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

518

mvpp2_write(priv, MVPP22_CLS_C2_ATTR2, c2->attr[2]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

519

mvpp2_write(priv, MVPP22_CLS_C2_ATTR3, c2->attr[3]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

521

mvpp2_write(priv, MVPP22_CLS_C2_TCAM_DATA0, c2->tcam[0]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

522

mvpp2_write(priv, MVPP22_CLS_C2_TCAM_DATA1, c2->tcam[1]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

523

mvpp2_write(priv, MVPP22_CLS_C2_TCAM_DATA2, c2->tcam[2]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

524

mvpp2_write(priv, MVPP22_CLS_C2_TCAM_DATA3, c2->tcam[3]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

526

mvpp2_write(priv, MVPP22_CLS_C2_TCAM_DATA4, c2->tcam[4]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

533

mvpp2_write(priv, MVPP22_CLS_C2_TCAM_IDX, index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

916

mvpp2_write(priv, MVPP2_CLS_MODE_REG, MVPP2_CLS_MODE_ACTIVE_MASK);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

947

mvpp2_write(priv, MVPP22_CLS_C2_TCAM_CTRL,

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

961

mvpp2_write(port->priv, MVPP2_CLS_PORT_WAY_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c

985

mvpp2_write(priv, MVPP22_CLS_C2_TCAM_IDX, c2_index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

1392

mvpp2_write(port->priv, MVPP2_ISR_ENABLE_REG(port->id),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

1403

mvpp2_write(port->priv, MVPP2_ISR_ENABLE_REG(port->id),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

1411

mvpp2_write(port->priv, MVPP2_ISR_ENABLE_REG(port->id),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

1419

mvpp2_write(port->priv, MVPP2_ISR_ENABLE_REG(port->id),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

1901

mvpp2_write(priv, MVPP2_CTRS_IDX, index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2273

mvpp2_write(port->priv, MVPP2_TXP_SCHED_PORT_INDEX_REG,

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2275

mvpp2_write(port->priv, MVPP2_TXP_SCHED_CMD_1_REG, 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2278

mvpp2_write(port->priv, MVPP2_TXP_SCHED_FIXED_PRIO_REG, 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2282

mvpp2_write(port->priv,

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2288

mvpp2_write(port->priv, MVPP2_TXP_SCHED_PERIOD_REG,

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2294

mvpp2_write(port->priv, MVPP2_TXP_SCHED_REFILL_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2296

mvpp2_write(port->priv, MVPP2_TXP_SCHED_TOKEN_SIZE_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2299

mvpp2_write(port->priv, MVPP2_RX_CTRL_REG(port->id),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2309

mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(queue), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2326

mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(queue), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2339

mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(queue), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2361

mvpp2_write(port->priv, MVPP2_TXP_SCHED_PORT_INDEX_REG, tx_port_num);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2362

mvpp2_write(port->priv, MVPP2_TXP_SCHED_Q_CMD_REG, qmap);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2375

mvpp2_write(port->priv, MVPP2_TXP_SCHED_PORT_INDEX_REG, tx_port_num);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2379

mvpp2_write(port->priv, MVPP2_TXP_SCHED_Q_CMD_REG,

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2424

mvpp2_write(port->priv, MVPP2_RXQ_STATUS_UPDATE_REG(rxq_id), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2454

mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(prxq), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2672

mvpp2_write(port->priv, MVPP2_TXP_SCHED_PORT_INDEX_REG, tx_port_num);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2678

mvpp2_write(port->priv, MVPP2_TXP_SCHED_MTU_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2687

mvpp2_write(port->priv, MVPP2_TXP_SCHED_TOKEN_SIZE_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2699

mvpp2_write(port->priv,

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2712

mvpp2_write(port->priv, MVPP2_RXQ_NUM_REG, rxq->id);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2717

mvpp2_write(port->priv, MVPP2_RXQ_THRESH_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2789

mvpp2_write(port->priv, MVPP2_ISR_RX_THRESHOLD_REG(rxq->id), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2805

mvpp2_write(port->priv, MVPP2_ISR_TX_THRESHOLD_REG(port->id), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2934

mvpp2_write(priv, MVPP2_AGGR_TXQ_DESC_ADDR_REG(thread), txq_dma);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2935

mvpp2_write(priv, MVPP2_AGGR_TXQ_DESC_SIZE_REG(thread),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

2962

mvpp2_write(port->priv, MVPP2_RXQ_STATUS_REG(rxq->id), 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

3081

mvpp2_write(port->priv, MVPP2_RXQ_STATUS_REG(rxq->id), 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

3139

mvpp2_write(port->priv, MVPP2_TXP_SCHED_PORT_INDEX_REG, tx_port_num);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

3145

mvpp2_write(port->priv, MVPP2_TXQ_SCHED_REFILL_REG(txq->log_id), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

3148

mvpp2_write(port->priv, MVPP2_TXQ_SCHED_TOKEN_SIZE_REG(txq->log_id),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

3210

mvpp2_write(port->priv, MVPP2_TXQ_SCHED_TOKEN_CNTR_REG(txq->log_id), 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

3280

mvpp2_write(port->priv, MVPP2_TX_PORT_FLUSH_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

3291

mvpp2_write(port->priv, MVPP2_TX_PORT_FLUSH_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

420

mvpp2_write(priv, MVPP2_BM_POOL_BASE_REG(bm_pool->id),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

422

mvpp2_write(priv, MVPP2_BM_POOL_SIZE_REG(bm_pool->id), size);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

439

mvpp2_write(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

4519

mvpp2_write(port->priv, MVPP2_ISR_MISC_CAUSE_REG, 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

458

mvpp2_write(priv, MVPP2_POOL_BUF_SIZE_REG(bm_pool->id), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

567

mvpp2_write(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

5960

mvpp2_write(priv, MVPP21_ISR_RXQ_GROUP_REG(port->id),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

5974

mvpp2_write(priv, MVPP22_ISR_RXQ_GROUP_INDEX_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

5978

mvpp2_write(priv, MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

614

mvpp2_write(priv, MVPP22_BM_POOL_BASE_ADDR_HIGH_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

633

mvpp2_write(priv, MVPP2_BM_POOL_CTRL_REG(pool_id), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

684

mvpp2_write(priv, MVPP2_BM_INTR_MASK_REG(i), 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

686

mvpp2_write(priv, MVPP2_BM_INTR_CAUSE_REG(i), 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7214

mvpp2_write(priv, MVPP2_WIN_BASE(i), 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7215

mvpp2_write(priv, MVPP2_WIN_SIZE(i), 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7218

mvpp2_write(priv, MVPP2_WIN_REMAP(i), 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7226

mvpp2_write(priv, MVPP2_WIN_BASE(i),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7230

mvpp2_write(priv, MVPP2_WIN_SIZE(i),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7236

mvpp2_write(priv, MVPP2_BASE_ADDR_ENABLE, win_enable);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7245

mvpp2_write(priv, MVPP2_RX_DATA_FIFO_SIZE_REG(port),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7247

mvpp2_write(priv, MVPP2_RX_ATTR_FIFO_SIZE_REG(port),

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7251

mvpp2_write(priv, MVPP2_RX_MIN_PKT_SIZE_REG,

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7253

mvpp2_write(priv, MVPP2_RX_FIFO_INIT_REG, 0x1);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7260

mvpp2_write(priv, MVPP2_RX_DATA_FIFO_SIZE_REG(port), data_size);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7261

mvpp2_write(priv, MVPP2_RX_ATTR_FIFO_SIZE_REG(port), attr_size);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7308

mvpp2_write(priv, MVPP2_RX_MIN_PKT_SIZE_REG,

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7310

mvpp2_write(priv, MVPP2_RX_FIFO_INIT_REG, 0x1);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7332

mvpp2_write(priv, MVPP2_RX_FC_REG(port), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7337

mvpp2_write(priv, MVPP2_RX_FC_REG(port), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7342

mvpp2_write(priv, MVPP2_RX_FC_REG(port), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7359

mvpp2_write(priv, MVPP2_RX_FC_REG(port), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7366

mvpp2_write(priv, MVPP22_TX_FIFO_SIZE_REG(port), size);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7367

mvpp2_write(priv, MVPP22_TX_FIFO_THRESH_REG(port), threshold);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

737

mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(prxq), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7416

mvpp2_write(priv, MVPP22_BM_ADDR_HIGH_RLS_REG, 0x0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7431

mvpp2_write(priv, MVPP22_AXI_BM_WR_ATTR_REG, wrval);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7432

mvpp2_write(priv, MVPP22_AXI_BM_RD_ATTR_REG, rdval);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7435

mvpp2_write(priv, MVPP22_AXI_AGGRQ_DESCR_RD_ATTR_REG, rdval);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7436

mvpp2_write(priv, MVPP22_AXI_TXQ_DESCR_WR_ATTR_REG, wrval);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7437

mvpp2_write(priv, MVPP22_AXI_TXQ_DESCR_RD_ATTR_REG, rdval);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7438

mvpp2_write(priv, MVPP22_AXI_RXQ_DESCR_WR_ATTR_REG, wrval);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7441

mvpp2_write(priv, MVPP22_AXI_TX_DATA_RD_ATTR_REG, rdval);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7442

mvpp2_write(priv, MVPP22_AXI_RX_DATA_WR_ATTR_REG, wrval);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7448

mvpp2_write(priv, MVPP22_AXI_RD_NORMAL_CODE_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7449

mvpp2_write(priv, MVPP22_AXI_WR_NORMAL_CODE_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7456

mvpp2_write(priv, MVPP22_AXI_RD_SNOOP_CODE_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7463

mvpp2_write(priv, MVPP22_AXI_WR_SNOOP_CODE_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

7522

mvpp2_write(priv, MVPP2_TX_SNOOP_REG, 0x1);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

758

mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(prxq), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

1138

mvpp2_write(priv, MVPP2_PRS_INIT_LOOKUP_REG, val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

1144

mvpp2_write(priv, MVPP2_PRS_MAX_LOOP_REG(port), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

1152

mvpp2_write(priv, MVPP2_PRS_INIT_OFFS_REG(port), val);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2175

mvpp2_write(priv, MVPP2_PRS_TCAM_CTRL_REG, MVPP2_PRS_TCAM_EN_MASK);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2179

mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2181

mvpp2_write(priv, MVPP2_PRS_TCAM_DATA_REG(i), 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2183

mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2185

mvpp2_write(priv, MVPP2_PRS_SRAM_DATA_REG(i), 0);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

2580

mvpp2_write(priv, MVPP2_PRS_TCAM_HIT_IDX_REG, index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

35

mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, pe->index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

37

mvpp2_write(priv, MVPP2_PRS_SRAM_DATA_REG(i), pe->sram[i]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

40

mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

42

mvpp2_write(priv, MVPP2_PRS_TCAM_DATA_REG(i), pe->tcam[i]);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

62

mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

73

mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, pe->index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

96

mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, index);

drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c

97

mvpp2_write(priv, MVPP2_PRS_TCAM_DATA_REG(MVPP2_PRS_TCAM_INV_WORD),