mux_data
const struct npcm7xx_clk_mux_data *mux_data = &npcm7xx_muxes[i];
mux_data->name,
mux_data->parent_names, mux_data->num_parents,
mux_data->flags, clk_base + NPCM7XX_CLKSEL,
mux_data->shift, mux_data->mask, 0,
mux_data->table, &npcm7xx_clk_lock);
if (mux_data->onecell_idx >= 0)
npcm7xx_clk_data->hws[mux_data->onecell_idx] = hw;
struct npcm8xx_clk_mux_data *mux_data = &npcm8xx_muxes[i];
mux_data->name,
mux_data->parent_data,
mux_data->num_parents,
mux_data->flags,
mux_data->shift,
mux_data->mask,
mux_data->table,
mux_data->hw = *hw;
static const struct mux_data sun4i_cpu_mux_data __initconst = {
static const struct mux_data sun6i_a31_ahb1_mux_data __initconst = {
static const struct mux_data sun8i_h3_ahb2_mux_data __initconst = {
const struct mux_data *data,
unsigned int mux_data = be32_to_cpu(*list++);
grp->pins[i] = (mux_data >> 8);
grp->data[i].func = (mux_data & 0xff);
mlxreg_lc->mux_data = mlxreg_lc_mux_data;
mlxreg_lc->mux_data->handle = mlxreg_lc;
mlxreg_lc->mux_data->completion_notify = mlxreg_lc_completion_notify;
mlxreg_lc->mux_brdinfo->platform_data = mlxreg_lc->mux_data;
NULL, 0, mlxreg_lc->mux_data,
sizeof(*mlxreg_lc->mux_data));
struct mlxcpld_mux_plat_data *mux_data;