musb_readl
status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG);
int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG);
rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG);
l1_ints = musb_readl(musb->mregs, USB_L1INTS) &
musb_readl(musb->mregs, USB_L1INTM);
EXPORT_SYMBOL_GPL(musb_readl);
musb_readl(musb->mregs, musb_regmap[i].offset));
epintr = musb_readl(reg_base, wrp->epintr_status);
usbintr = musb_readl(reg_base, wrp->coreintr_status);
int drvvbus = musb_readl(reg_base, wrp->status);
rev = musb_readl(reg_base, wrp->revision);
val = musb_readl(reg_base, wrp->phy_utmi);
reg = musb_readl(ctrl_base, wrp->mode);
u32 val = musb_readl(fifo, 0);
status = musb_readl(usbss_base, USBSS_IRQ_STATUS);
glue->context.control = musb_readl(mbase, wrp->control);
glue->context.epintr = musb_readl(mbase, wrp->epintr_set);
glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set);
glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi);
glue->context.mode = musb_readl(mbase, wrp->mode);
glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode);
glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode);
extern u32 musb_readl(void __iomem *addr, u32 offset);
DEFINE_EVENT(musb_regl, musb_readl,
musb_readl(mbase, \
musb_readl(mbase, \
l = musb_readl(musb->mregs, OTG_INTERFSEL);
musb_readl(musb->mregs, OTG_REVISION),
musb_readl(musb->mregs, OTG_SYSCONFIG),
musb_readl(musb->mregs, OTG_SYSSTATUS),
musb_readl(musb->mregs, OTG_INTERFSEL),
musb_readl(musb->mregs, OTG_SIMENABLE));
musb->context.otg_interfsel = musb_readl(musb->mregs,
l = musb_readl(musb->mregs, OTG_FORCESTDBY);
l = musb_readl(musb->mregs, OTG_FORCESTDBY);
if (musb_readl(tbase, TUSB_PROD_TEST_RESET) !=
phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
reg = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
reg = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
musb_readl(tbase, TUSB_PHY_OTG_CTRL),
musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE));
} else if (musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)
musb_readl(tbase, TUSB_PHY_OTG_CTRL),
musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE));
val = musb_readl(fifo, 0);
val = musb_readl(fifo, 0);
val = musb_readl(fifo, 0);
reg = musb_readl(tbase, TUSB_PRCM_MNGMT);
reg = musb_readl(tbase, TUSB_PRCM_CONF);
reg = musb_readl(tbase, TUSB_PRCM_MNGMT);
otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
prcm_mngmt = musb_readl(tbase, TUSB_PRCM_MNGMT);
otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
rev = musb_readl(tbase, TUSB_DMA_CTRL_REV) & 0xff;
prcm = musb_readl(tbase, TUSB_PRCM_MNGMT);
conf = musb_readl(tbase, TUSB_DEV_CONF);
die_id = TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase,
otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
musb_readl(tbase, TUSB_DEV_OTG_STAT),
otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
dev_conf = musb_readl(tbase, TUSB_DEV_CONF);
otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
u32 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
TUSB_REV_MAJOR(musb_readl(tbase, TUSB_PRCM_REV)),
TUSB_REV_MINOR(musb_readl(tbase, TUSB_PRCM_REV)),
TUSB_REV_MAJOR(musb_readl(tbase, TUSB_INT_CTRL_REV)),
TUSB_REV_MINOR(musb_readl(tbase, TUSB_INT_CTRL_REV)),
TUSB_REV_MAJOR(musb_readl(tbase, TUSB_GPIO_REV)),
TUSB_REV_MINOR(musb_readl(tbase, TUSB_GPIO_REV)),
int_mask = musb_readl(tbase, TUSB_INT_MASK);
int_src = musb_readl(tbase, TUSB_INT_SRC) & ~TUSB_INT_SRC_RESERVED_BITS;
TUSB_REV_MAJOR(musb_readl(tbase, TUSB_DMA_CTRL_REV)),
TUSB_REV_MINOR(musb_readl(tbase, TUSB_DMA_CTRL_REV)),
reg = musb_readl(tbase, TUSB_SCRATCH_PAD);
reg = musb_readl(tbase, TUSB_PRCM_WAKEUP_SOURCE);
TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase, TUSB_DIDR1_HI)),
u32 dma_src = musb_readl(tbase, TUSB_DMA_INT_SRC);
u32 musb_src = musb_readl(tbase, TUSB_USBIP_INT_SRC);
if (!(musb_readl(tbase, TUSB_DEV_OTG_STAT)
remaining = musb_readl(ep_conf, TUSB_EP_TX_OFFSET);
remaining = musb_readl(ep_conf, TUSB_EP_RX_OFFSET);
dma_remaining = musb_readl(ep_conf, TUSB_EP_TX_OFFSET);
dma_remaining = musb_readl(ep_conf, TUSB_EP_RX_OFFSET);
psize = musb_readl(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET);
psize = musb_readl(ep_conf, TUSB_EP_MAX_PACKET_SIZE_OFFSET);
u32 reg = musb_readl(chdat->tbase, TUSB_DMA_EP_MAP);
reg = musb_readl(chdat->tbase, TUSB_DMA_EP_MAP);
u32 reg = musb_readl(chdat->tbase, TUSB_DMA_EP_MAP);
u32 reg = musb_readl(chdat->tbase, TUSB_DMA_EP_MAP);