drivers/gpu/drm/mediatek/mtk_dpi.c

194

mtk_dpi_mask(dpi, DPI_PATTERN0, val, DPI_PAT_SEL | DPI_PAT_EN);

drivers/gpu/drm/mediatek/mtk_dpi.c

199

mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);

drivers/gpu/drm/mediatek/mtk_dpi.c

204

mtk_dpi_mask(dpi, DPI_EN, EN, EN);

drivers/gpu/drm/mediatek/mtk_dpi.c

209

mtk_dpi_mask(dpi, DPI_EN, 0, EN);

drivers/gpu/drm/mediatek/mtk_dpi.c

215

mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH, sync->sync_width << HPW,

drivers/gpu/drm/mediatek/mtk_dpi.c

217

mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->back_porch << HBP,

drivers/gpu/drm/mediatek/mtk_dpi.c

219

mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,

drivers/gpu/drm/mediatek/mtk_dpi.c

227

mtk_dpi_mask(dpi, width_addr,

drivers/gpu/drm/mediatek/mtk_dpi.c

230

mtk_dpi_mask(dpi, width_addr,

drivers/gpu/drm/mediatek/mtk_dpi.c

233

mtk_dpi_mask(dpi, porch_addr,

drivers/gpu/drm/mediatek/mtk_dpi.c

236

mtk_dpi_mask(dpi, porch_addr,

drivers/gpu/drm/mediatek/mtk_dpi.c

285

mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol, mask);

drivers/gpu/drm/mediatek/mtk_dpi.c

290

mtk_dpi_mask(dpi, DPI_CON, en_3d ? TDFP_EN : 0, TDFP_EN);

drivers/gpu/drm/mediatek/mtk_dpi.c

295

mtk_dpi_mask(dpi, DPI_CON, inter ? INTL_EN : 0, INTL_EN);

drivers/gpu/drm/mediatek/mtk_dpi.c

300

mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE,

drivers/gpu/drm/mediatek/mtk_dpi.c

302

mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE,

drivers/gpu/drm/mediatek/mtk_dpi.c

323

mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit.y_bottom << Y_LIMINT_BOT,

drivers/gpu/drm/mediatek/mtk_dpi.c

325

mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit.y_top << Y_LIMINT_TOP,

drivers/gpu/drm/mediatek/mtk_dpi.c

327

mtk_dpi_mask(dpi, DPI_C_LIMIT, limit.c_bottom << C_LIMIT_BOT,

drivers/gpu/drm/mediatek/mtk_dpi.c

329

mtk_dpi_mask(dpi, DPI_C_LIMIT, limit.c_top << C_LIMIT_TOP,

drivers/gpu/drm/mediatek/mtk_dpi.c

355

mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << OUT_BIT,

drivers/gpu/drm/mediatek/mtk_dpi.c

385

mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << YC_MAP, YC_MAP_MASK);

drivers/gpu/drm/mediatek/mtk_dpi.c

417

mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,

drivers/gpu/drm/mediatek/mtk_dpi.c

424

mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->yuv422_en_bit : 0,

drivers/gpu/drm/mediatek/mtk_dpi.c

430

mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : 0,

drivers/gpu/drm/mediatek/mtk_dpi.c

436

mtk_dpi_mask(dpi, DPI_CON, enable ? IN_RB_SWAP : 0, IN_RB_SWAP);

drivers/gpu/drm/mediatek/mtk_dpi.c

442

mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, H_FRE_2N, H_FRE_2N);

drivers/gpu/drm/mediatek/mtk_dpi.c

448

mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN);

drivers/gpu/drm/mediatek/mtk_dpi.c

471

mtk_dpi_mask(dpi, DPI_MATRIX_SET, dpi->mode.hdisplay <= 720 ?

drivers/gpu/drm/mediatek/mtk_dpi.c

489

mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE,

drivers/gpu/drm/mediatek/mtk_dpi.c

491

mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,

drivers/gpu/drm/mediatek/mtk_dpi.c

497

mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, 0);

drivers/gpu/drm/mediatek/mtk_dpi.c

682

mtk_dpi_mask(dpi, DPI_CON, DPI_OUTPUT_1T1P_EN, DPI_OUTPUT_1T1P_EN);

drivers/gpu/drm/mediatek/mtk_dpi.c

689

mtk_dpi_mask(dpi, DPI_CON, dpi->conf->input_2p_en_bit,