drivers/gpu/drm/mediatek/mtk_crtc.c

1001

return mtk_crtc->dma_dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

101

if (mtk_crtc->event) {

drivers/gpu/drm/mediatek/mtk_crtc.c

1011

struct mtk_crtc *mtk_crtc;

drivers/gpu/drm/mediatek/mtk_crtc.c

103

drm_crtc_send_vblank_event(crtc, mtk_crtc->event);

drivers/gpu/drm/mediatek/mtk_crtc.c

105

mtk_crtc->event = NULL;

drivers/gpu/drm/mediatek/mtk_crtc.c

1052

mtk_crtc = devm_kzalloc(dev, sizeof(*mtk_crtc), GFP_KERNEL);

drivers/gpu/drm/mediatek/mtk_crtc.c

1053

if (!mtk_crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

1056

mtk_crtc->mmsys_dev = priv->mmsys_dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

1057

mtk_crtc->ddp_comp_nr = path_len;

drivers/gpu/drm/mediatek/mtk_crtc.c

1058

mtk_crtc->ddp_comp = devm_kcalloc(dev,

drivers/gpu/drm/mediatek/mtk_crtc.c

1059

mtk_crtc->ddp_comp_nr + (conn_routes ? 1 : 0),

drivers/gpu/drm/mediatek/mtk_crtc.c

1060

sizeof(*mtk_crtc->ddp_comp),

drivers/gpu/drm/mediatek/mtk_crtc.c

1062

if (!mtk_crtc->ddp_comp)

drivers/gpu/drm/mediatek/mtk_crtc.c

1065

mtk_crtc->mutex = mtk_mutex_get(priv->mutex_dev);

drivers/gpu/drm/mediatek/mtk_crtc.c

1066

if (IS_ERR(mtk_crtc->mutex)) {

drivers/gpu/drm/mediatek/mtk_crtc.c

1067

ret = PTR_ERR(mtk_crtc->mutex);

drivers/gpu/drm/mediatek/mtk_crtc.c

1072

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

1077

mtk_crtc->ddp_comp[i] = comp;

drivers/gpu/drm/mediatek/mtk_crtc.c

1092

&mtk_crtc->base);

drivers/gpu/drm/mediatek/mtk_crtc.c

1095

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)

drivers/gpu/drm/mediatek/mtk_crtc.c

1096

num_comp_planes += mtk_crtc_num_comp_planes(mtk_crtc, i);

drivers/gpu/drm/mediatek/mtk_crtc.c

1098

mtk_crtc->planes = devm_kcalloc(dev, num_comp_planes,

drivers/gpu/drm/mediatek/mtk_crtc.c

110

static void mtk_drm_finish_page_flip(struct mtk_crtc *mtk_crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

1100

if (!mtk_crtc->planes)

drivers/gpu/drm/mediatek/mtk_crtc.c

1103

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

1104

ret = mtk_crtc_init_comp_planes(drm_dev, mtk_crtc, i, crtc_i);

drivers/gpu/drm/mediatek/mtk_crtc.c

1114

mtk_crtc->dma_dev = mtk_ddp_comp_dma_dev_get(&priv->ddp_comp[path[0]]);

drivers/gpu/drm/mediatek/mtk_crtc.c

1116

ret = mtk_crtc_init(drm_dev, mtk_crtc, crtc_i);

drivers/gpu/drm/mediatek/mtk_crtc.c

1121

drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size);

drivers/gpu/drm/mediatek/mtk_crtc.c

1122

drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size);

drivers/gpu/drm/mediatek/mtk_crtc.c

1123

mutex_init(&mtk_crtc->hw_lock);

drivers/gpu/drm/mediatek/mtk_crtc.c

1124

spin_lock_init(&mtk_crtc->config_lock);

drivers/gpu/drm/mediatek/mtk_crtc.c

1128

mtk_crtc->cmdq_client.client.dev = mtk_crtc->mmsys_dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

1129

mtk_crtc->cmdq_client.client.tx_block = false;

drivers/gpu/drm/mediatek/mtk_crtc.c

1130

mtk_crtc->cmdq_client.client.knows_txdone = true;

drivers/gpu/drm/mediatek/mtk_crtc.c

1131

mtk_crtc->cmdq_client.client.rx_callback = ddp_cmdq_cb;

drivers/gpu/drm/mediatek/mtk_crtc.c

1132

mtk_crtc->cmdq_client.chan =

drivers/gpu/drm/mediatek/mtk_crtc.c

1133

mbox_request_channel(&mtk_crtc->cmdq_client.client, i);

drivers/gpu/drm/mediatek/mtk_crtc.c

1134

if (IS_ERR(mtk_crtc->cmdq_client.chan)) {

drivers/gpu/drm/mediatek/mtk_crtc.c

1136

drm_crtc_index(&mtk_crtc->base));

drivers/gpu/drm/mediatek/mtk_crtc.c

1137

mtk_crtc->cmdq_client.chan = NULL;

drivers/gpu/drm/mediatek/mtk_crtc.c

114

drm_crtc_handle_vblank(&mtk_crtc->base);

drivers/gpu/drm/mediatek/mtk_crtc.c

1140

if (mtk_crtc->cmdq_client.chan) {

drivers/gpu/drm/mediatek/mtk_crtc.c

1144

&mtk_crtc->cmdq_event);

drivers/gpu/drm/mediatek/mtk_crtc.c

1147

drm_crtc_index(&mtk_crtc->base));

drivers/gpu/drm/mediatek/mtk_crtc.c

1148

mbox_free_channel(mtk_crtc->cmdq_client.chan);

drivers/gpu/drm/mediatek/mtk_crtc.c

1149

mtk_crtc->cmdq_client.chan = NULL;

drivers/gpu/drm/mediatek/mtk_crtc.c

1151

ret = cmdq_pkt_create(&mtk_crtc->cmdq_client,

drivers/gpu/drm/mediatek/mtk_crtc.c

1152

&mtk_crtc->cmdq_handle,

drivers/gpu/drm/mediatek/mtk_crtc.c

1156

drm_crtc_index(&mtk_crtc->base));

drivers/gpu/drm/mediatek/mtk_crtc.c

1157

mbox_free_channel(mtk_crtc->cmdq_client.chan);

drivers/gpu/drm/mediatek/mtk_crtc.c

1158

mtk_crtc->cmdq_client.chan = NULL;

drivers/gpu/drm/mediatek/mtk_crtc.c

1163

init_waitqueue_head(&mtk_crtc->cb_blocking_queue);

drivers/gpu/drm/mediatek/mtk_crtc.c

117

if (mtk_crtc->cmdq_client.chan)

drivers/gpu/drm/mediatek/mtk_crtc.c

1184

mtk_crtc->num_conn_routes = num_conn_routes;

drivers/gpu/drm/mediatek/mtk_crtc.c

1185

mtk_crtc->conn_routes = conn_routes;

drivers/gpu/drm/mediatek/mtk_crtc.c

1188

mtk_crtc->ddp_comp_nr++;

drivers/gpu/drm/mediatek/mtk_crtc.c

121

spin_lock_irqsave(&mtk_crtc->config_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

122

if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) {

drivers/gpu/drm/mediatek/mtk_crtc.c

123

mtk_crtc_finish_page_flip(mtk_crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

124

mtk_crtc->pending_needs_vblank = false;

drivers/gpu/drm/mediatek/mtk_crtc.c

126

spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

131

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

134

mtk_mutex_put(mtk_crtc->mutex);

drivers/gpu/drm/mediatek/mtk_crtc.c

136

if (mtk_crtc->cmdq_client.chan) {

drivers/gpu/drm/mediatek/mtk_crtc.c

137

cmdq_pkt_destroy(&mtk_crtc->cmdq_client, &mtk_crtc->cmdq_handle);

drivers/gpu/drm/mediatek/mtk_crtc.c

138

mbox_free_channel(mtk_crtc->cmdq_client.chan);

drivers/gpu/drm/mediatek/mtk_crtc.c

139

mtk_crtc->cmdq_client.chan = NULL;

drivers/gpu/drm/mediatek/mtk_crtc.c

143

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

146

comp = mtk_crtc->ddp_comp[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

195

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

199

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

200

status = mtk_ddp_comp_mode_valid(mtk_crtc->ddp_comp[i], mode);

drivers/gpu/drm/mediatek/mtk_crtc.c

226

static int mtk_crtc_ddp_clk_enable(struct mtk_crtc *mtk_crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

228

struct drm_device *dev = mtk_crtc->base.dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

232

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

233

ret = mtk_ddp_comp_clk_enable(mtk_crtc->ddp_comp[i]);

drivers/gpu/drm/mediatek/mtk_crtc.c

243

mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]);

drivers/gpu/drm/mediatek/mtk_crtc.c

247

static void mtk_crtc_ddp_clk_disable(struct mtk_crtc *mtk_crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

251

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)

drivers/gpu/drm/mediatek/mtk_crtc.c

252

mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]);

drivers/gpu/drm/mediatek/mtk_crtc.c

260

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

263

unsigned int local_index = plane - mtk_crtc->planes;

drivers/gpu/drm/mediatek/mtk_crtc.c

265

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

266

comp = mtk_crtc->ddp_comp[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

283

struct mtk_crtc *mtk_crtc = container_of(cmdq_cl, struct mtk_crtc, cmdq_client);

drivers/gpu/drm/mediatek/mtk_crtc.c

295

state = to_mtk_crtc_state(mtk_crtc->base.state);

drivers/gpu/drm/mediatek/mtk_crtc.c

297

spin_lock_irqsave(&mtk_crtc->config_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

298

if (mtk_crtc->config_updating)

drivers/gpu/drm/mediatek/mtk_crtc.c

303

if (mtk_crtc->pending_planes) {

drivers/gpu/drm/mediatek/mtk_crtc.c

304

for (i = 0; i < mtk_crtc->layer_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

305

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

312

mtk_crtc->pending_planes = false;

drivers/gpu/drm/mediatek/mtk_crtc.c

315

if (mtk_crtc->pending_async_planes) {

drivers/gpu/drm/mediatek/mtk_crtc.c

316

for (i = 0; i < mtk_crtc->layer_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

317

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

324

mtk_crtc->pending_async_planes = false;

drivers/gpu/drm/mediatek/mtk_crtc.c

329

if (mtk_crtc->pending_needs_vblank) {

drivers/gpu/drm/mediatek/mtk_crtc.c

330

mtk_crtc_finish_page_flip(mtk_crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

331

mtk_crtc->pending_needs_vblank = false;

drivers/gpu/drm/mediatek/mtk_crtc.c

334

spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

336

mtk_crtc->cmdq_vblank_cnt = 0;

drivers/gpu/drm/mediatek/mtk_crtc.c

337

wake_up(&mtk_crtc->cb_blocking_queue);

drivers/gpu/drm/mediatek/mtk_crtc.c

341

static int mtk_crtc_ddp_hw_init(struct mtk_crtc *mtk_crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

343

struct drm_crtc *crtc = &mtk_crtc->base;

drivers/gpu/drm/mediatek/mtk_crtc.c

347

struct drm_device *dev = mtk_crtc->base.dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

380

ret = mtk_mutex_prepare(mtk_crtc->mutex);

drivers/gpu/drm/mediatek/mtk_crtc.c

386

ret = mtk_crtc_ddp_clk_enable(mtk_crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

392

for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

393

if (!mtk_ddp_comp_connect(mtk_crtc->ddp_comp[i], mtk_crtc->mmsys_dev,

drivers/gpu/drm/mediatek/mtk_crtc.c

394

mtk_crtc->ddp_comp[i + 1]->id))

drivers/gpu/drm/mediatek/mtk_crtc.c

395

mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,

drivers/gpu/drm/mediatek/mtk_crtc.c

396

mtk_crtc->ddp_comp[i]->id,

drivers/gpu/drm/mediatek/mtk_crtc.c

397

mtk_crtc->ddp_comp[i + 1]->id);

drivers/gpu/drm/mediatek/mtk_crtc.c

398

if (!mtk_ddp_comp_add(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))

drivers/gpu/drm/mediatek/mtk_crtc.c

399

mtk_mutex_add_comp(mtk_crtc->mutex,

drivers/gpu/drm/mediatek/mtk_crtc.c

400

mtk_crtc->ddp_comp[i]->id);

drivers/gpu/drm/mediatek/mtk_crtc.c

402

if (!mtk_ddp_comp_add(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))

drivers/gpu/drm/mediatek/mtk_crtc.c

403

mtk_mutex_add_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);

drivers/gpu/drm/mediatek/mtk_crtc.c

404

mtk_mutex_enable(mtk_crtc->mutex);

drivers/gpu/drm/mediatek/mtk_crtc.c

406

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

407

struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

417

for (i = 0; i < mtk_crtc->layer_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

418

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

436

mtk_mutex_unprepare(mtk_crtc->mutex);

drivers/gpu/drm/mediatek/mtk_crtc.c

442

static void mtk_crtc_ddp_hw_fini(struct mtk_crtc *mtk_crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

444

struct drm_device *drm = mtk_crtc->base.dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

445

struct drm_crtc *crtc = &mtk_crtc->base;

drivers/gpu/drm/mediatek/mtk_crtc.c

449

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

450

mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]);

drivers/gpu/drm/mediatek/mtk_crtc.c

452

mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]);

drivers/gpu/drm/mediatek/mtk_crtc.c

455

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)

drivers/gpu/drm/mediatek/mtk_crtc.c

456

if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))

drivers/gpu/drm/mediatek/mtk_crtc.c

457

mtk_mutex_remove_comp(mtk_crtc->mutex,

drivers/gpu/drm/mediatek/mtk_crtc.c

458

mtk_crtc->ddp_comp[i]->id);

drivers/gpu/drm/mediatek/mtk_crtc.c

459

mtk_mutex_disable(mtk_crtc->mutex);

drivers/gpu/drm/mediatek/mtk_crtc.c

460

for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

461

if (!mtk_ddp_comp_disconnect(mtk_crtc->ddp_comp[i], mtk_crtc->mmsys_dev,

drivers/gpu/drm/mediatek/mtk_crtc.c

462

mtk_crtc->ddp_comp[i + 1]->id))

drivers/gpu/drm/mediatek/mtk_crtc.c

463

mtk_mmsys_ddp_disconnect(mtk_crtc->mmsys_dev,

drivers/gpu/drm/mediatek/mtk_crtc.c

464

mtk_crtc->ddp_comp[i]->id,

drivers/gpu/drm/mediatek/mtk_crtc.c

465

mtk_crtc->ddp_comp[i + 1]->id);

drivers/gpu/drm/mediatek/mtk_crtc.c

466

if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))

drivers/gpu/drm/mediatek/mtk_crtc.c

467

mtk_mutex_remove_comp(mtk_crtc->mutex,

drivers/gpu/drm/mediatek/mtk_crtc.c

468

mtk_crtc->ddp_comp[i]->id);

drivers/gpu/drm/mediatek/mtk_crtc.c

470

if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))

drivers/gpu/drm/mediatek/mtk_crtc.c

471

mtk_mutex_remove_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);

drivers/gpu/drm/mediatek/mtk_crtc.c

472

mtk_crtc_ddp_clk_disable(mtk_crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

473

mtk_mutex_unprepare(mtk_crtc->mutex);

drivers/gpu/drm/mediatek/mtk_crtc.c

488

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

489

struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state);

drivers/gpu/drm/mediatek/mtk_crtc.c

490

struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];

drivers/gpu/drm/mediatek/mtk_crtc.c

509

if (mtk_crtc->pending_planes) {

drivers/gpu/drm/mediatek/mtk_crtc.c

510

for (i = 0; i < mtk_crtc->layer_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

511

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

530

mtk_crtc->pending_planes = false;

drivers/gpu/drm/mediatek/mtk_crtc.c

533

if (mtk_crtc->pending_async_planes) {

drivers/gpu/drm/mediatek/mtk_crtc.c

534

for (i = 0; i < mtk_crtc->layer_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

535

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

554

mtk_crtc->pending_async_planes = false;

drivers/gpu/drm/mediatek/mtk_crtc.c

558

static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank)

drivers/gpu/drm/mediatek/mtk_crtc.c

561

struct cmdq_pkt *cmdq_handle = &mtk_crtc->cmdq_handle;

drivers/gpu/drm/mediatek/mtk_crtc.c

563

struct drm_crtc *crtc = &mtk_crtc->base;

drivers/gpu/drm/mediatek/mtk_crtc.c

569

mutex_lock(&mtk_crtc->hw_lock);

drivers/gpu/drm/mediatek/mtk_crtc.c

571

spin_lock_irqsave(&mtk_crtc->config_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

572

mtk_crtc->config_updating = true;

drivers/gpu/drm/mediatek/mtk_crtc.c

573

spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

576

mtk_crtc->pending_needs_vblank = true;

drivers/gpu/drm/mediatek/mtk_crtc.c

578

for (i = 0; i < mtk_crtc->layer_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

579

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

594

mtk_crtc->pending_planes = true;

drivers/gpu/drm/mediatek/mtk_crtc.c

596

mtk_crtc->pending_async_planes = true;

drivers/gpu/drm/mediatek/mtk_crtc.c

599

mtk_mutex_acquire(mtk_crtc->mutex);

drivers/gpu/drm/mediatek/mtk_crtc.c

601

mtk_mutex_release(mtk_crtc->mutex);

drivers/gpu/drm/mediatek/mtk_crtc.c

604

if (mtk_crtc->cmdq_client.chan) {

drivers/gpu/drm/mediatek/mtk_crtc.c

605

mbox_flush(mtk_crtc->cmdq_client.chan, 2000);

drivers/gpu/drm/mediatek/mtk_crtc.c

607

cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event);

drivers/gpu/drm/mediatek/mtk_crtc.c

608

cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false);

drivers/gpu/drm/mediatek/mtk_crtc.c

611

dma_sync_single_for_device(mtk_crtc->cmdq_client.chan->mbox->dev,

drivers/gpu/drm/mediatek/mtk_crtc.c

622

mtk_crtc->cmdq_vblank_cnt = 3;

drivers/gpu/drm/mediatek/mtk_crtc.c

624

spin_lock_irqsave(&mtk_crtc->config_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

625

mtk_crtc->config_updating = false;

drivers/gpu/drm/mediatek/mtk_crtc.c

626

spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

628

if (pm_runtime_resume_and_get(mtk_crtc->cmdq_client.chan->mbox->dev) < 0)

drivers/gpu/drm/mediatek/mtk_crtc.c

631

mbox_send_message(mtk_crtc->cmdq_client.chan, cmdq_handle);

drivers/gpu/drm/mediatek/mtk_crtc.c

632

mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0);

drivers/gpu/drm/mediatek/mtk_crtc.c

636

spin_lock_irqsave(&mtk_crtc->config_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

637

mtk_crtc->config_updating = false;

drivers/gpu/drm/mediatek/mtk_crtc.c

638

spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);

drivers/gpu/drm/mediatek/mtk_crtc.c

643

mutex_unlock(&mtk_crtc->hw_lock);

drivers/gpu/drm/mediatek/mtk_crtc.c

649

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

653

struct drm_device *dev = mtk_crtc->base.dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

654

if (!priv->data->shadow_register && !mtk_crtc->cmdq_client.chan)

drivers/gpu/drm/mediatek/mtk_crtc.c

656

else if (mtk_crtc->cmdq_vblank_cnt > 0 && --mtk_crtc->cmdq_vblank_cnt == 0)

drivers/gpu/drm/mediatek/mtk_crtc.c

658

drm_crtc_index(&mtk_crtc->base));

drivers/gpu/drm/mediatek/mtk_crtc.c

663

mtk_drm_finish_page_flip(mtk_crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

668

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

669

struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];

drivers/gpu/drm/mediatek/mtk_crtc.c

678

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

679

struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];

drivers/gpu/drm/mediatek/mtk_crtc.c

691

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

698

if (!mtk_crtc->num_conn_routes)

drivers/gpu/drm/mediatek/mtk_crtc.c

707

for (i = 0; i < mtk_crtc->num_conn_routes; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

708

unsigned int comp_id = mtk_crtc->conn_routes[i].route_ddp;

drivers/gpu/drm/mediatek/mtk_crtc.c

713

mtk_crtc->ddp_comp[mtk_crtc->ddp_comp_nr - 1] = comp;

drivers/gpu/drm/mediatek/mtk_crtc.c

715

comp->id, mtk_crtc->ddp_comp_nr - 1);

drivers/gpu/drm/mediatek/mtk_crtc.c

736

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

741

if (!mtk_crtc->cmdq_client.chan)

drivers/gpu/drm/mediatek/mtk_crtc.c

744

if (!mtk_crtc->enabled)

drivers/gpu/drm/mediatek/mtk_crtc.c

748

for (i = 0; i < mtk_crtc->layer_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

749

struct drm_plane *mtk_plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

757

mtk_crtc_update_config(mtk_crtc, false);

drivers/gpu/drm/mediatek/mtk_crtc.c

760

wait_event_timeout(mtk_crtc->cb_blocking_queue,

drivers/gpu/drm/mediatek/mtk_crtc.c

761

mtk_crtc->cmdq_vblank_cnt == 0,

drivers/gpu/drm/mediatek/mtk_crtc.c

769

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

771

if (!mtk_crtc->enabled)

drivers/gpu/drm/mediatek/mtk_crtc.c

774

mtk_crtc_update_config(mtk_crtc, false);

drivers/gpu/drm/mediatek/mtk_crtc.c

780

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

781

struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];

drivers/gpu/drm/mediatek/mtk_crtc.c

782

struct drm_device *dev = mtk_crtc->base.dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

795

ret = mtk_crtc_ddp_hw_init(mtk_crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

802

mtk_crtc->enabled = true;

drivers/gpu/drm/mediatek/mtk_crtc.c

808

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

809

struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];

drivers/gpu/drm/mediatek/mtk_crtc.c

810

struct drm_device *dev = mtk_crtc->base.dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

814

if (!mtk_crtc->enabled)

drivers/gpu/drm/mediatek/mtk_crtc.c

818

for (i = 0; i < mtk_crtc->layer_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

819

struct drm_plane *plane = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

826

mtk_crtc->pending_planes = true;

drivers/gpu/drm/mediatek/mtk_crtc.c

828

mtk_crtc_update_config(mtk_crtc, false);

drivers/gpu/drm/mediatek/mtk_crtc.c

831

if (mtk_crtc->cmdq_client.chan)

drivers/gpu/drm/mediatek/mtk_crtc.c

832

wait_event_timeout(mtk_crtc->cb_blocking_queue,

drivers/gpu/drm/mediatek/mtk_crtc.c

833

mtk_crtc->cmdq_vblank_cnt == 0,

drivers/gpu/drm/mediatek/mtk_crtc.c

840

mtk_crtc_ddp_hw_fini(mtk_crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

843

mtk_crtc->enabled = false;

drivers/gpu/drm/mediatek/mtk_crtc.c

852

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

853

struct drm_device *dev = mtk_crtc->base.dev;

drivers/gpu/drm/mediatek/mtk_crtc.c

856

if (mtk_crtc->event && mtk_crtc_state->base.event)

drivers/gpu/drm/mediatek/mtk_crtc.c

86

static inline struct mtk_crtc *to_mtk_crtc(struct drm_crtc *c)

drivers/gpu/drm/mediatek/mtk_crtc.c

864

mtk_crtc->event = mtk_crtc_state->base.event;

drivers/gpu/drm/mediatek/mtk_crtc.c

874

struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

878

for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

879

mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

88

return container_of(c, struct mtk_crtc, base);

drivers/gpu/drm/mediatek/mtk_crtc.c

880

mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);

drivers/gpu/drm/mediatek/mtk_crtc.c

882

mtk_crtc_update_config(mtk_crtc, !!mtk_crtc->event);

drivers/gpu/drm/mediatek/mtk_crtc.c

906

static int mtk_crtc_init(struct drm_device *drm, struct mtk_crtc *mtk_crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

913

for (i = 0; i < mtk_crtc->layer_nr; i++) {

drivers/gpu/drm/mediatek/mtk_crtc.c

914

if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_PRIMARY)

drivers/gpu/drm/mediatek/mtk_crtc.c

915

primary = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

916

else if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_CURSOR)

drivers/gpu/drm/mediatek/mtk_crtc.c

917

cursor = &mtk_crtc->planes[i];

drivers/gpu/drm/mediatek/mtk_crtc.c

920

ret = drm_crtc_init_with_planes(drm, &mtk_crtc->base, primary, cursor,

drivers/gpu/drm/mediatek/mtk_crtc.c

925

drm_crtc_helper_add(&mtk_crtc->base, &mtk_crtc_helper_funcs);

drivers/gpu/drm/mediatek/mtk_crtc.c

930

drm_crtc_cleanup(&mtk_crtc->base);

drivers/gpu/drm/mediatek/mtk_crtc.c

934

static int mtk_crtc_num_comp_planes(struct mtk_crtc *mtk_crtc, int comp_idx)

drivers/gpu/drm/mediatek/mtk_crtc.c

941

comp = mtk_crtc->ddp_comp[comp_idx];

drivers/gpu/drm/mediatek/mtk_crtc.c

96

static void mtk_crtc_finish_page_flip(struct mtk_crtc *mtk_crtc)

drivers/gpu/drm/mediatek/mtk_crtc.c

965

struct mtk_crtc *mtk_crtc,

drivers/gpu/drm/mediatek/mtk_crtc.c

968

int num_planes = mtk_crtc_num_comp_planes(mtk_crtc, comp_idx);

drivers/gpu/drm/mediatek/mtk_crtc.c

969

struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[comp_idx];

drivers/gpu/drm/mediatek/mtk_crtc.c

974

&mtk_crtc->planes[mtk_crtc->layer_nr],

drivers/gpu/drm/mediatek/mtk_crtc.c

976

mtk_crtc_plane_type(mtk_crtc->layer_nr, num_planes),

drivers/gpu/drm/mediatek/mtk_crtc.c

98

struct drm_crtc *crtc = &mtk_crtc->base;

drivers/gpu/drm/mediatek/mtk_crtc.c

985

mtk_crtc->layer_nr++;

drivers/gpu/drm/mediatek/mtk_crtc.c

992

struct mtk_crtc *mtk_crtc = NULL;

drivers/gpu/drm/mediatek/mtk_crtc.c

997

mtk_crtc = to_mtk_crtc(crtc);

drivers/gpu/drm/mediatek/mtk_crtc.c

998

if (!mtk_crtc)