Symbol: modulo
drivers/clk/mmp/clk-audio.c
146
val |= SSPA_AUD_PLL_CTRL0_DIV_OCLK_MODULO(postdivs[postdiv].modulo);
drivers/clk/mmp/clk-audio.c
214
val |= SSPA_AUD_PLL_CTRL0_DIV_OCLK_MODULO(postdivs[postdiv].modulo);
drivers/clk/mmp/clk-audio.c
98
unsigned char modulo;
drivers/dma/k3dma.c
592
size_t modulo = DMA_CYCLIC_MAX_PERIOD;
drivers/dma/k3dma.c
600
if (avail > modulo)
drivers/dma/k3dma.c
601
num += DIV_ROUND_UP(avail, modulo) - 1;
drivers/dma/k3dma.c
614
if (period_len < modulo)
drivers/dma/k3dma.c
615
modulo = period_len;
drivers/dma/k3dma.c
618
len = min_t(size_t, avail, modulo);
drivers/dma/stm32/stm32-dma.c
1359
u32 modulo, burst_size;
drivers/dma/stm32/stm32-dma.c
1415
modulo = residue % burst_size;
drivers/dma/stm32/stm32-dma.c
1416
if (modulo)
drivers/dma/stm32/stm32-dma.c
1417
residue = residue - modulo + burst_size;
drivers/dma/stm32/stm32-mdma.c
1325
u32 cisr, clar, cbndtr, residue, modulo, burst_size;
drivers/dma/stm32/stm32-mdma.c
1353
modulo = residue % burst_size;
drivers/dma/stm32/stm32-mdma.c
1354
if (modulo)
drivers/dma/stm32/stm32-mdma.c
1355
residue = residue - modulo + burst_size;
drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c
53
int modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c
56
modulo = 0xff; // use FF at the end
drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c
57
phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c
66
DPPCLK0_DTO_MODULO, modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c
52
int modulo = ref_dppclk / 10000;
drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c
69
if (phase > modulo) {
drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c
74
phase = modulo;
drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c
90
DPPCLK0_DTO_MODULO, modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
575
uint32_t modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
578
modulo = params->ref_dtbclk_khz * 1000;
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
579
phase = (uint32_t)div_u64((((unsigned long long)modulo * req_dtbclk_khz) + params->ref_dtbclk_khz - 1),
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
585
REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
61
int modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
619
uint32_t modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
622
modulo = params->ref_dtbclk_khz * 1000;
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
623
phase = (uint32_t)div_u64((((unsigned long long)modulo * params->req_audio_dtbclk_khz) + params->ref_dtbclk_khz - 1),
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
627
REG_WRITE(DCCG_AUDIO_DTBCLK_DTO_MODULO, modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
64
modulo = 0xff; // use FF at the end
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
65
phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
74
DPPCLK0_DTO_MODULO, modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c
215
uint32_t modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c
218
modulo = params->ref_dtbclk_khz * 1000;
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c
221
REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c
214
uint32_t modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c
217
modulo = params->ref_dtbclk_khz * 1000;
drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c
220
REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1285
int modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1288
modulo = 0xff; // use FF at the end
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1289
phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1299
DPPCLK0_DTO_MODULO, modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1499
uint32_t modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1517
modulo = params->ref_dtbclk_khz * 1000;
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1520
REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1541
params->ref_dtbclk_khz, req_dtbclk_khz, phase, modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2477
int modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2480
modulo = 0xff; // use FF at the end
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2481
phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2494
DPPCLK0_DTO_MODULO, modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2626
uint32_t modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2631
modulo = params->ref_dtbclk_khz * 1000;
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2634
REG_WRITE(DTBCLK_DTO_MODULO[params->otg_inst], modulo);
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
84
int modulo, phase;
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
87
modulo = 0xff; // use FF at the end
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
88
phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
97
DPPCLK0_DTO_MODULO, modulo);
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2435
uint64_t modulo[MAX_PIPES];
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2473
modulo[i] = dp_ref_clk_100hz*100;
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2480
modulo[i] = (uint64_t)dp_ref_clk_100hz*
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2485
&modulo[i], true) == false) {
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
2501
(unsigned int)phase[i], (unsigned int)modulo[i]);
drivers/gpu/drm/meson/meson_venc.c
1158
de_h_begin = modulo(readl_relaxed(priv->io_base +
drivers/gpu/drm/meson/meson_venc.c
1162
de_h_end = modulo(de_h_begin + active_pixels_venc,
drivers/gpu/drm/meson/meson_venc.c
1196
hs_end = modulo(hs_begin + hsync_pixels_venc,
drivers/gpu/drm/meson/meson_venc.c
1267
vso_begin_odd = modulo(hs_begin
drivers/gpu/drm/meson/meson_venc.c
1282
vso_begin_evn = modulo(hs_begin
drivers/gpu/drm/meson/meson_venc.c
1405
de_h_begin = modulo(readl_relaxed(priv->io_base +
drivers/gpu/drm/meson/meson_venc.c
1409
de_h_end = modulo(de_h_begin + active_pixels_venc,
drivers/gpu/drm/meson/meson_venc.c
1459
hs_end = modulo(hs_begin + hsync_pixels_venc,
drivers/gpu/drm/meson/meson_venc.c
1481
vs_eline_evn = modulo(vs_bline_evn + vsync_lines,
drivers/gpu/drm/meson/meson_venc.c
1502
vso_begin_odd = modulo(hs_begin
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/M0209.h
10
u8 modulo;
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
121
u32 bits = (i % M0209E.modulo) * M0209E.bits;
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
83
info->modulo = nvbios_rd08(bios, data + 0x01);
drivers/media/dvb-frontends/dib7000m.c
398
reg_907 = (bw->pll_bypass << 15) | (bw->modulo << 7) |
drivers/media/dvb-frontends/dib7000m.c
443
dib7000m_write_word(state, 910, (1 << 12) | (2 << 10) | (bw->modulo << 8) | (bw->ADClkSrc << 7));
drivers/media/dvb-frontends/dib7000p.c
457
(bw->modulo << 7) | (bw->ADClkSrc << 6) | (bw->IO_CLK_en_core << 5) | (bw->bypclk_div << 2) | (bw->enable_refdiv << 1) | (0 << 0);
drivers/media/dvb-frontends/dib8000.c
717
(pll->modulo << 8) |
drivers/media/dvb-frontends/dib8000.c
722
(pll->modulo << 8) |
drivers/media/dvb-frontends/dib8000.c
726
(3 << 10) | (pll->modulo << 8) |
drivers/media/dvb-frontends/dib8000.c
739
dib8000_write_word(state, 904, (pll->modulo << 8));
drivers/media/dvb-frontends/dibx000_common.h
129
u8 modulo;
drivers/media/pci/cx23885/cx23885-dvb.c
1048
.modulo = 2,
drivers/media/usb/dvb-usb/cxusb.c
1083
.modulo = 2,
drivers/media/usb/dvb-usb/dib0700_devices.c
1186
.modulo = 2,
drivers/media/usb/dvb-usb/dib0700_devices.c
1526
.modulo = 2,
drivers/media/usb/dvb-usb/dib0700_devices.c
1962
.modulo = 2,
drivers/media/usb/dvb-usb/dib0700_devices.c
233
.modulo = 2,
drivers/media/usb/dvb-usb/dib0700_devices.c
2787
.modulo = 2,
drivers/media/usb/dvb-usb/dib0700_devices.c
3570
.modulo = 0,
drivers/media/usb/dvb-usb/dib0700_devices.c
399
.modulo = 0,
drivers/media/usb/dvb-usb/dib0700_devices.c
668
.modulo = 0,
drivers/media/usb/dvb-usb/dib0700_devices.c
960
.modulo = 2,
drivers/media/usb/go7007/go7007-fw.c
417
int modulo, int pict_struct, enum mpeg_frame_type frame)
drivers/media/usb/go7007/go7007-fw.c
718
int modulo, enum mpeg_frame_type frame)
drivers/media/usb/go7007/go7007-fw.c
725
if (modulo)
drivers/net/wan/hdlc_x25.c
205
if (state(hdlc)->settings.modulo == 128)
drivers/net/wan/hdlc_x25.c
308
new_settings.modulo = 8;
drivers/net/wan/hdlc_x25.c
319
(new_settings.modulo != 8 &&
drivers/net/wan/hdlc_x25.c
320
new_settings.modulo != 128) ||
drivers/net/wan/hdlc_x25.c
322
(new_settings.modulo == 8 &&
drivers/net/wan/hdlc_x25.c
324
(new_settings.modulo == 128 &&
drivers/net/wireless/broadcom/b43/dma.c
992
(unsigned long long)modulo(permille_failed, 10),
drivers/net/wireless/broadcom/b43/dma.c
994
(unsigned long long)modulo(average_tries, 100));
drivers/scsi/scsi_debug.c
7138
int count, modulo;
drivers/scsi/scsi_debug.c
7140
modulo = abs(sdebug_every_nth);
drivers/scsi/scsi_debug.c
7141
if (modulo < 2)
drivers/scsi/scsi_debug.c
7147
atomic_set(&sdebug_cmnd_count, (count / modulo) * modulo);
include/uapi/linux/hdlc/ioctl.h
84
unsigned int modulo; /* modulo (8 = basic / 128 = extended) */
lib/bch.c
354
return bch->a_pow_tab[modulo(bch, i)];
lib/bch.c
620
roots[n++] = modulo(bch, 2*GF_N(bch)-l1-
lib/bch.c
622
roots[n++] = modulo(bch, 2*GF_N(bch)-l1-