mm_pool32a_op

arch/mips/kernel/branch.c

69

case mm_pool32a_op:

arch/mips/kernel/process.c

208

if (ip->r_format.opcode == mm_pool32a_op &&

arch/mips/kernel/process.c

339

if (ip->r_format.opcode != mm_pool32a_op ||

arch/mips/kernel/unaligned.c

677

case mm_pool32a_op:

arch/mips/mm/uasm-micromips.c

101

[insn_sll] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sll32_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

102

[insn_sllv] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

103

[insn_slt] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_slt_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

105

[insn_sltu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sltu_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

106

[insn_sra] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

107

[insn_srav] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srav_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

108

[insn_srl] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

109

[insn_srlv] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srlv32_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

110

[insn_rotr] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_rotr_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

111

[insn_subu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_subu32_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

113

[insn_sync] = {M(mm_pool32a_op, 0, 0, 0, mm_sync_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

114

[insn_tlbp] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbp_op, mm_pool32axf_op), 0},

arch/mips/mm/uasm-micromips.c

115

[insn_tlbr] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbr_op, mm_pool32axf_op), 0},

arch/mips/mm/uasm-micromips.c

116

[insn_tlbwi] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbwi_op, mm_pool32axf_op), 0},

arch/mips/mm/uasm-micromips.c

117

[insn_tlbwr] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbwr_op, mm_pool32axf_op), 0},

arch/mips/mm/uasm-micromips.c

118

[insn_wait] = {M(mm_pool32a_op, 0, 0, 0, mm_wait_op, mm_pool32axf_op), SCIMM},

arch/mips/mm/uasm-micromips.c

119

[insn_wsbh] = {M(mm_pool32a_op, 0, 0, 0, mm_wsbh_op, mm_pool32axf_op), RT | RS},

arch/mips/mm/uasm-micromips.c

120

[insn_xor] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_xor32_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

124

[insn_syscall] = {M(mm_pool32a_op, 0, 0, 0, mm_syscall_op, mm_pool32axf_op), SCIMM},

arch/mips/mm/uasm-micromips.c

43

[insn_addu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_addu32_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

45

[insn_and] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_and_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

61

[insn_di] = {M(mm_pool32a_op, 0, 0, 0, mm_di_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

62

[insn_divu] = {M(mm_pool32a_op, 0, 0, 0, mm_divu_op, mm_pool32axf_op), RT | RS},

arch/mips/mm/uasm-micromips.c

73

[insn_eret] = {M(mm_pool32a_op, 0, 0, 0, mm_eret_op, mm_pool32axf_op), 0},

arch/mips/mm/uasm-micromips.c

74

[insn_ins] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_ins_op), RT | RS | RD | RE},

arch/mips/mm/uasm-micromips.c

75

[insn_ext] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_ext_op), RT | RS | RD | RE},

arch/mips/mm/uasm-micromips.c

78

[insn_jalr] = {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RT | RS},

arch/mips/mm/uasm-micromips.c

79

[insn_jr] = {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

87

[insn_mfc0] = {M(mm_pool32a_op, 0, 0, 0, mm_mfc0_op, mm_pool32axf_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

88

[insn_mfhi] = {M(mm_pool32a_op, 0, 0, 0, mm_mfhi32_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

89

[insn_mflo] = {M(mm_pool32a_op, 0, 0, 0, mm_mflo32_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

90

[insn_mtc0] = {M(mm_pool32a_op, 0, 0, 0, mm_mtc0_op, mm_pool32axf_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

91

[insn_mthi] = {M(mm_pool32a_op, 0, 0, 0, mm_mthi32_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

92

[insn_mtlo] = {M(mm_pool32a_op, 0, 0, 0, mm_mtlo32_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

93

[insn_mul] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_mul_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

94

[insn_or] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_or32_op), RT | RS | RD},

Linux

arch/mips/kernel/branch.c

arch/mips/kernel/process.c

arch/mips/kernel/process.c

arch/mips/kernel/unaligned.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c

arch/mips/mm/uasm-micromips.c