mt7601u_bbp_wr
mt7601u_bbp_wr(dev, offset, val);
mt7601u_bbp_wr(dev, offset, val);
mt7601u_bbp_wr(dev, 178, 0xff);
mt7601u_bbp_wr(dev, 4, 0x60);
mt7601u_bbp_wr(dev, 178, 0);
mt7601u_bbp_wr(dev, 47, flag);
mt7601u_bbp_wr(dev, 22, 0x40);
mt7601u_bbp_wr(dev, 22, 0);
mt7601u_bbp_wr(dev, 21, bbp_val);
mt7601u_bbp_wr(dev, 21, bbp_val);
mt7601u_bbp_wr(dev, 158, 0x8c);
mt7601u_bbp_wr(dev, 58, 0);
mt7601u_bbp_wr(dev, 241, 0x2);
mt7601u_bbp_wr(dev, 23, 0x8);
mt7601u_bbp_wr(dev, 23, (i < 2) ? 0x08 : 0x02);
mt7601u_bbp_wr(dev, 22, 0);
mt7601u_bbp_wr(dev, 244, 0);
mt7601u_bbp_wr(dev, 21, 1);
mt7601u_bbp_wr(dev, 21, 0);
mt7601u_bbp_wr(dev, 47, 0x50);
mt7601u_bbp_wr(dev, (i & 1) ? 244 : 22, (i & 1) ? 0x31 : 0x40);
mt7601u_bbp_wr(dev, 47, 0x40);
mt7601u_bbp_wr(dev, 22, 0);
mt7601u_bbp_wr(dev, 244, 0);
mt7601u_bbp_wr(dev, 21, 1);
mt7601u_bbp_wr(dev, 21, 0);
mt7601u_bbp_wr(dev, 47, bbp_r47);
mt7601u_bbp_wr(dev, 66, agc);
mt7601u_bbp_wr(dev, 66, dev->agc_save);
mt7601u_bbp_wr(dev, 66, val);