mt352_read_register
if ( (mt352_read_register(state,0x00) & 0xC0) != 0xC0 )
tps = (mt352_read_register(state, TPS_RECEIVED_1) << 8) | mt352_read_register(state, TPS_RECEIVED_0);
div = (mt352_read_register(state, CHAN_START_1) << 8) | mt352_read_register(state, CHAN_START_0);
trl = mt352_read_register(state, TRL_NOMINAL_RATE_1);
if (mt352_read_register(state, STATUS_2) & 0x02)
if ((s0 = mt352_read_register(state, STATUS_0)) < 0)
if ((s1 = mt352_read_register(state, STATUS_1)) < 0)
if ((s3 = mt352_read_register(state, STATUS_3)) < 0)
*ber = (mt352_read_register (state, RS_ERR_CNT_2) << 16) |
(mt352_read_register (state, RS_ERR_CNT_1) << 8) |
(mt352_read_register (state, RS_ERR_CNT_0));
u16 signal = ((mt352_read_register(state, AGC_GAIN_1) & 0x0f) << 12) |
(mt352_read_register(state, AGC_GAIN_0) << 4);
u8 _snr = mt352_read_register (state, SNR);
*ucblocks = (mt352_read_register (state, RS_UBC_1) << 8) |
(mt352_read_register (state, RS_UBC_0));
if ((mt352_read_register(state, CLOCK_CTL) & 0x10) == 0 ||
(mt352_read_register(state, CONFIG) & 0x20) == 0) {
if (mt352_read_register(state, CHIP_ID) != ID_MT352) goto error;