drivers/gpu/drm/msm/adreno/a2xx_gpu.c

10

static void a2xx_dump(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

11

static bool a2xx_idle(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

111

static int a2xx_hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

13

static void a2xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

269

static void a2xx_recover(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

290

static void a2xx_destroy(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

302

static bool a2xx_idle(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

320

static irqreturn_t a2xx_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

451

static void a2xx_dump(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

458

static struct msm_gpu_state *a2xx_gpu_state_get(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

473

a2xx_create_vm(struct msm_gpu *gpu, struct platform_device *pdev)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

486

static u32 a2xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

496

static struct msm_gpu *a2xx_gpu_init(struct drm_device *dev)

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

500

struct msm_gpu *gpu;

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

54

static bool a2xx_me_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a2xx_gpu.h

24

struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a2xx_gpummu.c

16

struct msm_gpu *gpu;

drivers/gpu/drm/msm/adreno/a2xx_gpummu.c

94

struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

112

static int a3xx_hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

28

static void a3xx_dump(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

29

static bool a3xx_idle(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

31

static void a3xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

366

static void a3xx_recover(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

387

static void a3xx_destroy(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

401

static bool a3xx_idle(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

419

static irqreturn_t a3xx_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

474

static void a3xx_dump(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

481

static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

495

static u64 a3xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

505

static u32 a3xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

518

static struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

522

struct msm_gpu *gpu;

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

85

static bool a3xx_me_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

156

static bool a4xx_me_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

183

static int a4xx_hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

22

static void a4xx_dump(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

23

static bool a4xx_idle(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

25

static void a4xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

350

static void a4xx_recover(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

371

static void a4xx_destroy(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

385

static bool a4xx_idle(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

402

static irqreturn_t a4xx_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

551

static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

565

static void a4xx_dump(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

572

static int a4xx_pm_resume(struct msm_gpu *gpu) {

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

592

static int a4xx_pm_suspend(struct msm_gpu *gpu) {

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

607

static int a4xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

614

static u64 a4xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

624

static u32 a4xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

630

static struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

634

struct msm_gpu *gpu;

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

76

static void a4xx_enable_hwcg(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_debugfs.c

14

static void pfp_print(struct msm_gpu *gpu, struct drm_printer *p)

drivers/gpu/drm/msm/adreno/a5xx_debugfs.c

144

void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor)

drivers/gpu/drm/msm/adreno/a5xx_debugfs.c

27

static void me_print(struct msm_gpu *gpu, struct drm_printer *p)

drivers/gpu/drm/msm/adreno/a5xx_debugfs.c

40

static void meq_print(struct msm_gpu *gpu, struct drm_printer *p)

drivers/gpu/drm/msm/adreno/a5xx_debugfs.c

53

static void roq_print(struct msm_gpu *gpu, struct drm_printer *p)

drivers/gpu/drm/msm/adreno/a5xx_debugfs.c

76

void (*show)(struct msm_gpu *gpu, struct drm_printer *p) =

drivers/gpu/drm/msm/adreno/a5xx_debugfs.c

97

struct msm_gpu *gpu = priv->gpu;

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1015

static void a5xx_recover(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1035

static void a5xx_destroy(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1068

static inline bool _a5xx_check_idle(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1081

bool a5xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1110

struct msm_gpu *gpu = arg;

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1126

static void a5xx_cp_err_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1177

static void a5xx_rbbm_err_irq(struct msm_gpu *gpu, u32 status)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1218

static void a5xx_uche_err_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1228

static void a5xx_gpmu_err_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1233

static void a5xx_fault_detect_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

127

static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1271

static irqreturn_t a5xx_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1346

static void a5xx_dump(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1353

static int a5xx_pm_resume(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1399

static int a5xx_pm_suspend(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1438

static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1456

static int a5xx_crashdumper_init(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1469

static int a5xx_crashdumper_run(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1512

static void a5xx_gpu_state_get_hlsq_regs(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1571

static struct msm_gpu_state *a5xx_gpu_state_get(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1623

static void a5xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1664

static struct msm_ringbuffer *a5xx_active_ring(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1672

static u64 a5xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1682

static uint32_t a5xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

17

static void a5xx_dump(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1725

static struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

1733

struct msm_gpu *gpu;

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

21

static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

33

void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring,

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

446

void a5xx_set_hwcg(struct msm_gpu *gpu, bool state)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

477

static int a5xx_me_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

519

static int a5xx_preempt_start(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

582

static int a5xx_ucode_load(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

644

static int a5xx_zap_shader_resume(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

66

static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

664

static int a5xx_zap_shader_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

695

static int a5xx_hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

138

int a5xx_power_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

139

void a5xx_gpmu_ucode_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

141

static inline int spin_usecs(struct msm_gpu *gpu, uint32_t usecs,

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

157

bool a5xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

158

void a5xx_set_hwcg(struct msm_gpu *gpu, bool state);

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

160

void a5xx_preempt_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

161

void a5xx_preempt_hw_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

162

void a5xx_preempt_trigger(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

163

void a5xx_preempt_irq(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

164

void a5xx_preempt_fini(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

166

void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, bool sync);

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

54

void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor);

drivers/gpu/drm/msm/adreno/a5xx_power.c

103

static inline uint32_t _get_mvolts(struct msm_gpu *gpu, uint32_t freq)

drivers/gpu/drm/msm/adreno/a5xx_power.c

122

static void a530_lm_setup(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_power.c

175

static void a540_lm_setup(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_power.c

211

static void a5xx_pc_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_power.c

220

static int a5xx_gpmu_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_power.c

278

static void a5xx_lm_enable(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_power.c

295

int a5xx_power_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_power.c

324

void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

175

void a5xx_preempt_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

217

void a5xx_preempt_hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

250

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

292

void a5xx_preempt_fini(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

304

void a5xx_preempt_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

40

static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

56

static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

84

struct msm_gpu *gpu = &a5xx_gpu->base.base;

drivers/gpu/drm/msm/adreno/a5xx_preempt.c

95

void a5xx_preempt_trigger(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1090

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1133

static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1147

static void a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1163

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

120

void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp,

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1344

struct msm_gpu *gpu = &a6xx_gpu->base.base;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1703

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1802

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1845

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

1945

void a6xx_gmu_sysprof_setup(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2058

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

2144

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

216

unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

25

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

897

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1057

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

110

static inline bool _a6xx_check_idle(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1120

static int a6xx_ucode_load(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1197

int a6xx_zap_shader_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1247

static int hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

128

static bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

147

static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

160

void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1609

static int a6xx_hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1622

static void a6xx_dump(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1629

static void a6xx_recover(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1705

static const char *a6xx_uche_fault_block(struct msm_gpu *gpu, u32 mid)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1802

static const char *a6xx_fault_block(struct msm_gpu *gpu, u32 id)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1822

struct msm_gpu *gpu = arg;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1839

static void a6xx_cp_hw_err_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1881

static void a6xx_fault_detect_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1914

static void a7xx_sw_fuse_violation_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1935

static void a6xx_gpu_keepalive_vote(struct msm_gpu *gpu, bool on)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1946

static int irq_poll_fence(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

1968

static irqreturn_t a6xx_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2029

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2089

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2158

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2213

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2248

void a6xx_gpu_sw_reset(struct msm_gpu *gpu, bool assert)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2264

static int a6xx_gmu_pm_resume(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2292

static int a6xx_pm_resume(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2351

static int a6xx_gmu_pm_suspend(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2378

static int a6xx_pm_suspend(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2417

static int a6xx_gmu_get_timestamp(struct msm_gpu *gpu, uint64_t *value)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2427

static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2433

static struct msm_ringbuffer *a6xx_active_ring(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2441

static void a6xx_destroy(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2470

static u64 a6xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2486

static void a6xx_gpu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp,

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2498

a6xx_create_vm(struct msm_gpu *gpu, struct platform_device *pdev)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2516

a6xx_create_private_vm(struct msm_gpu *gpu, bool kernel_managed)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2529

static uint32_t a6xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2547

static bool a6xx_progress(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2638

static struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

2646

struct msm_gpu *gpu;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

32

static bool fence_status_check(struct msm_gpu *gpu, u32 offset, u32 value, u32 status, u32 mask)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

328

static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

452

static void a7xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

53

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

625

static void a6xx_set_hwcg(struct msm_gpu *gpu, bool state)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

707

static void a6xx_set_cp_protect(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

808

static void a6xx_set_ubwc_config(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

870

static void a7xx_patch_pwrup_reglist(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

941

static int a7xx_preempt_start(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

969

static int a6xx_cp_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

998

static int a7xx_cp_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

274

void a6xx_gmu_sysprof_setup(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

276

void a6xx_preempt_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

277

void a6xx_preempt_hw_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

278

void a6xx_preempt_trigger(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

279

void a6xx_preempt_irq(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

280

void a6xx_preempt_fini(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

281

int a6xx_preempt_submitqueue_setup(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

283

void a6xx_preempt_submitqueue_close(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

304

void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp,

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

306

unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

308

void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

311

struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

315

void a6xx_gpu_sw_reset(struct msm_gpu *gpu, bool assert);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

317

void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

318

int a6xx_zap_shader_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

322

void a8xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

323

int a8xx_gmu_get_timestamp(struct msm_gpu *gpu, uint64_t *value);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

324

u64 a8xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

325

int a8xx_gpu_feature_probe(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

326

void a8xx_gpu_get_slice_info(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

327

int a8xx_hw_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

328

irqreturn_t a8xx_irq(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

330

bool a8xx_progress(struct msm_gpu *gpu, struct msm_ringbuffer *ring);

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

331

void a8xx_recover(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1005

static void a6xx_get_crashdumper_hlsq_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1043

static void a6xx_get_crashdumper_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1085

static void a7xx_get_crashdumper_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1124

static void a6xx_get_ahb_gpu_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1154

static void a7xx_get_ahb_gpu_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1178

static void a7xx_get_ahb_gpu_reglist(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1190

static void _a6xx_get_gmu_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1227

static void a6xx_get_gmu_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1287

static void a6xx_snapshot_gmu_hfi_history(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1308

static void a6xx_get_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

131

static int a6xx_crashdumper_init(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1368

static void a7xx_get_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1429

static void a7xx_get_post_crashdumper_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

144

static int a6xx_crashdumper_run(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1443

static u32 a6xx_get_cp_roq_size(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1449

static u32 a7xx_get_cp_roq_size(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1462

static void a6xx_get_indexed_regs(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1487

static void a6xx_get_indexed_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1538

static void a7xx_get_indexed_registers(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1582

struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

174

static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

1976

void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

208

static int cx_debugbus_read(struct msm_gpu *gpu, void __iomem *cxdbg, u32 block, u32 offset,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

236

static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

260

static void a6xx_get_vbif_debugbus_block(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

314

static void a6xx_get_debugbus_block(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

332

static void a6xx_get_cx_debugbus_block(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

351

static void a6xx_get_debugbus_blocks(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

398

static void a7xx_get_debugbus_blocks(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

446

static void a6xx_get_debugbus(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

562

static void a6xx_get_dbgahb_cluster(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

608

static void a7xx_get_dbgahb_cluster(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

650

static void a6xx_get_dbgahb_clusters(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

671

static void a7xx_get_dbgahb_clusters(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

708

static void a6xx_get_cluster(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

768

static void a7xx_get_cluster(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

813

static void a6xx_get_clusters(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

832

static void a7xx_get_clusters(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

867

static void a6xx_get_shader_block(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

901

static void a7xx_get_shader_block(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

951

static void a6xx_get_shaders(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

970

static void a7xx_get_shaders(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h

406

static u32 a6xx_get_cp_roq_size(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h

407

static u32 a7xx_get_cp_roq_size(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h

414

u32 (*count_fn)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

143

static void a6xx_preempt_keepalive_vote(struct msm_gpu *gpu, bool on)

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

154

void a6xx_preempt_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

205

void a6xx_preempt_hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

241

void a6xx_preempt_trigger(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

358

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

421

void a6xx_preempt_fini(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

431

void a6xx_preempt_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

63

static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a6xx_preempt.c

92

struct msm_gpu *gpu = &a6xx_gpu->base.base;

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1048

static void a8xx_sw_fuse_violation_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1069

irqreturn_t a8xx_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1123

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1155

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1177

int a8xx_gmu_get_timestamp(struct msm_gpu *gpu, uint64_t *value)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1196

u64 a8xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

120

static inline bool _a8xx_check_idle(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

1212

bool a8xx_progress(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

138

static bool a8xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

158

void a8xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

186

static void a8xx_set_hwcg(struct msm_gpu *gpu, bool state)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

19

static void a8xx_aperture_slice_set(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 slice)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

225

static void a8xx_set_cp_protect(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

264

static void a8xx_set_ubwc_config(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

35

static void a8xx_aperture_acquire(struct msm_gpu *gpu, enum adreno_pipe pipe, unsigned long *flags)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

358

static void a8xx_nonctxt_config(struct msm_gpu *gpu, u32 *gmem_protect)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

389

static int a8xx_cp_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

45

static void a8xx_aperture_release(struct msm_gpu *gpu, unsigned long flags)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

504

static int hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

53

static void a8xx_aperture_clear(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

61

static void a8xx_write_pipe(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 offset, u32 data)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

70

static u32 a8xx_read_pipe_slice(struct msm_gpu *gpu, enum adreno_pipe pipe, u32 slice, u32 offset)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

717

int a8xx_hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

730

static void a8xx_dump(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

736

void a8xx_recover(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

799

static const char *a8xx_uche_fault_block(struct msm_gpu *gpu, u32 mid)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

838

static const char *a8xx_fault_block(struct msm_gpu *gpu, u32 id)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

85

void a8xx_gpu_get_slice_info(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

867

struct msm_gpu *gpu = arg;

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

884

static void a8xx_cp_hw_err_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

952

static u32 gpu_periph_read(struct msm_gpu *gpu, u32 dbg_offset)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

959

static u64 gpu_periph_read64(struct msm_gpu *gpu, u32 dbg_offset)

drivers/gpu/drm/msm/adreno/a8xx_gpu.c

982

static void a8xx_fault_detect_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_device.c

216

struct msm_gpu *gpu;

drivers/gpu/drm/msm/adreno/adreno_device.c

258

struct msm_gpu *gpu = dev_to_gpu(dev);

drivers/gpu/drm/msm/adreno/adreno_device.c

309

struct msm_gpu *gpu = dev_to_gpu(dev);

drivers/gpu/drm/msm/adreno/adreno_device.c

316

struct msm_gpu *gpu = dev_to_gpu(dev);

drivers/gpu/drm/msm/adreno/adreno_device.c

328

static void suspend_scheduler(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_device.c

350

static void resume_scheduler(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_device.c

363

struct msm_gpu *gpu = dev_to_gpu(dev);

drivers/gpu/drm/msm/adreno/adreno_device.c

390

struct msm_gpu *gpu = dev_to_gpu(dev);

drivers/gpu/drm/msm/adreno/adreno_device.c

68

struct msm_gpu *adreno_load_gpu(struct drm_device *dev)

drivers/gpu/drm/msm/adreno/adreno_device.c

72

struct msm_gpu *gpu = NULL;

drivers/gpu/drm/msm/adreno/adreno_gpu.c

1028

void adreno_dump_info(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

1050

void adreno_dump(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

1091

struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

1185

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/adreno_gpu.c

1246

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/adreno_gpu.c

169

int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

188

adreno_create_vm(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/adreno_gpu.c

195

adreno_iommu_create_vm(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/adreno_gpu.c

229

u64 adreno_private_vm_size(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

257

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/adreno_gpu.c

283

int adreno_fault_handler(struct msm_gpu *gpu, unsigned long iova, int flags,

drivers/gpu/drm/msm/adreno/adreno_gpu.c

30

static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname,

drivers/gpu/drm/msm/adreno/adreno_gpu.c

359

int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,

drivers/gpu/drm/msm/adreno/adreno_gpu.c

451

int adreno_set_param(struct msm_gpu *gpu, struct msm_context *ctx,

drivers/gpu/drm/msm/adreno/adreno_gpu.c

627

struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/adreno_gpu.c

646

int adreno_hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

688

struct msm_gpu *gpu = &adreno_gpu->base;

drivers/gpu/drm/msm/adreno/adreno_gpu.c

693

struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

698

void adreno_recover(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

716

void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, u32 reg)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

736

bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

752

int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

930

void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state,

drivers/gpu/drm/msm/adreno/adreno_gpu.h

205

struct msm_gpu base;

drivers/gpu/drm/msm/adreno/adreno_gpu.h

608

u64 adreno_private_vm_size(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

609

int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,

drivers/gpu/drm/msm/adreno/adreno_gpu.h

611

int adreno_set_param(struct msm_gpu *gpu, struct msm_context *ctx,

drivers/gpu/drm/msm/adreno/adreno_gpu.h

615

struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/adreno_gpu.h

617

int adreno_hw_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

618

void adreno_recover(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

619

void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, u32 reg);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

620

bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

622

void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state,

drivers/gpu/drm/msm/adreno/adreno_gpu.h

625

void adreno_dump_info(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

626

void adreno_dump(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

628

struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

642

int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

652

adreno_create_vm(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/adreno_gpu.h

656

adreno_iommu_create_vm(struct msm_gpu *gpu,

drivers/gpu/drm/msm/adreno/adreno_gpu.h

660

int adreno_fault_handler(struct msm_gpu *gpu, unsigned long iova, int flags,

drivers/gpu/drm/msm/adreno/adreno_gpu.h

672

int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

81

struct msm_gpu *(*init)(struct drm_device *dev);

drivers/gpu/drm/msm/adreno/adreno_gpu.h

82

int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value);

drivers/gpu/drm/msm/msm_debugfs.c

37

struct msm_gpu *gpu = priv->gpu;

drivers/gpu/drm/msm/msm_debugfs.c

57

struct msm_gpu *gpu = priv->gpu;

drivers/gpu/drm/msm/msm_debugfs.c

72

struct msm_gpu *gpu = priv->gpu;

drivers/gpu/drm/msm/msm_drv.c

308

struct msm_gpu *gpu;

drivers/gpu/drm/msm/msm_drv.c

330

struct msm_gpu *gpu;

drivers/gpu/drm/msm/msm_drv.h

44

struct msm_gpu;

drivers/gpu/drm/msm/msm_drv.h

84

struct msm_gpu *gpu;

drivers/gpu/drm/msm/msm_fence.c

13

static struct msm_gpu *fctx2gpu(struct msm_fence_context *fctx)

drivers/gpu/drm/msm/msm_gem.h

433

struct msm_gpu *gpu;

drivers/gpu/drm/msm/msm_gem_submit.c

33

struct msm_gpu *gpu,

drivers/gpu/drm/msm/msm_gem_submit.c

556

struct msm_gpu *gpu = priv->gpu;

drivers/gpu/drm/msm/msm_gem_vma.c

1426

struct msm_gpu *gpu = priv->gpu;

drivers/gpu/drm/msm/msm_gpu.c

1125

void msm_gpu_cleanup(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

125

int msm_gpu_pm_suspend(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

151

void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_context *ctx,

drivers/gpu/drm/msm/msm_gpu.c

159

int msm_gpu_hw_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

181

struct msm_gpu *gpu = data;

drivers/gpu/drm/msm/msm_gpu.c

215

struct msm_gpu *gpu = data;

drivers/gpu/drm/msm/msm_gpu.c

25

static int enable_pwrrail(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

363

static void msm_gpu_crashstate_capture(struct msm_gpu *gpu,

drivers/gpu/drm/msm/msm_gpu.c

408

static void msm_gpu_crashstate_capture(struct msm_gpu *gpu,

drivers/gpu/drm/msm/msm_gpu.c

437

static void retire_submits(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.c

465

struct msm_gpu *gpu = container_of(work, struct msm_gpu, recover_work);

drivers/gpu/drm/msm/msm_gpu.c

49

static int disable_pwrrail(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

58

static int enable_clk(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

585

void msm_gpu_fault_crashstate_capture(struct msm_gpu *gpu, struct msm_gpu_fault_info *fault_info)

drivers/gpu/drm/msm/msm_gpu.c

619

static void hangcheck_timer_reset(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

626

static bool made_progress(struct msm_gpu *gpu, struct msm_ringbuffer *ring)

drivers/gpu/drm/msm/msm_gpu.c

643

struct msm_gpu *gpu = timer_container_of(gpu, t, hangcheck_timer);

drivers/gpu/drm/msm/msm_gpu.c

680

static int update_hw_cntrs(struct msm_gpu *gpu, uint32_t ncntrs, uint32_t *cntrs)

drivers/gpu/drm/msm/msm_gpu.c

70

static int disable_clk(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

700

static void update_sw_cntrs(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

724

void msm_gpu_perfcntr_start(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

740

void msm_gpu_perfcntr_stop(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

747

int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime,

drivers/gpu/drm/msm/msm_gpu.c

777

static void retire_submit(struct msm_gpu *gpu, struct msm_ringbuffer *ring,

drivers/gpu/drm/msm/msm_gpu.c

826

static void retire_submits(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

861

struct msm_gpu *gpu = container_of(work, struct msm_gpu, retire_work);

drivers/gpu/drm/msm/msm_gpu.c

867

void msm_gpu_retire(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

879

void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)

drivers/gpu/drm/msm/msm_gpu.c

88

static int enable_axi(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

926

struct msm_gpu *gpu = data;

drivers/gpu/drm/msm/msm_gpu.c

93

static int disable_axi(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

930

static int get_clocks(struct platform_device *pdev, struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.c

952

msm_gpu_create_private_vm(struct msm_gpu *gpu, struct task_struct *task,

drivers/gpu/drm/msm/msm_gpu.c

977

struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs,

drivers/gpu/drm/msm/msm_gpu.c

99

int msm_gpu_pm_resume(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.h

280

static inline struct msm_gpu *dev_to_gpu(struct device *dev)

drivers/gpu/drm/msm/msm_gpu.h

287

return container_of(adreno_smmu, struct msm_gpu, adreno_smmu);

drivers/gpu/drm/msm/msm_gpu.h

291

adreno_smmu_has_prr(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.h

309

static inline bool msm_gpu_active(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.h

49

int (*get_param)(struct msm_gpu *gpu, struct msm_context *ctx,

drivers/gpu/drm/msm/msm_gpu.h

490

static inline int msm_gpu_convert_priority(struct msm_gpu *gpu, int prio,

drivers/gpu/drm/msm/msm_gpu.h

51

int (*set_param)(struct msm_gpu *gpu, struct msm_context *ctx,

drivers/gpu/drm/msm/msm_gpu.h

53

int (*hw_init)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

58

int (*ucode_load)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

595

static inline void gpu_write(struct msm_gpu *gpu, u32 reg, u32 data)

drivers/gpu/drm/msm/msm_gpu.h

60

int (*pm_suspend)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

601

static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg)

drivers/gpu/drm/msm/msm_gpu.h

607

static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or)

drivers/gpu/drm/msm/msm_gpu.h

61

int (*pm_resume)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

613

static inline u64 gpu_read64(struct msm_gpu *gpu, u32 reg)

drivers/gpu/drm/msm/msm_gpu.h

62

void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit);

drivers/gpu/drm/msm/msm_gpu.h

63

void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);

drivers/gpu/drm/msm/msm_gpu.h

639

static inline void gpu_write64(struct msm_gpu *gpu, u32 reg, u64 val)

drivers/gpu/drm/msm/msm_gpu.h

64

irqreturn_t (*irq)(struct msm_gpu *irq);

drivers/gpu/drm/msm/msm_gpu.h

648

int msm_gpu_pm_suspend(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

649

int msm_gpu_pm_resume(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

65

struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

651

void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_context *ctx,

drivers/gpu/drm/msm/msm_gpu.h

66

void (*recover)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

667

int msm_context_set_sysprof(struct msm_context *ctx, struct msm_gpu *gpu, int sysprof);

drivers/gpu/drm/msm/msm_gpu.h

67

void (*destroy)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

682

void msm_devfreq_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

683

void msm_devfreq_cleanup(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

684

void msm_devfreq_resume(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

685

void msm_devfreq_suspend(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

686

void msm_devfreq_boost(struct msm_gpu *gpu, unsigned factor);

drivers/gpu/drm/msm/msm_gpu.h

687

void msm_devfreq_active(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

688

void msm_devfreq_idle(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

690

int msm_gpu_hw_init(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

692

void msm_gpu_perfcntr_start(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

693

void msm_gpu_perfcntr_stop(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

694

int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime,

drivers/gpu/drm/msm/msm_gpu.h

697

void msm_gpu_retire(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

698

void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit);

drivers/gpu/drm/msm/msm_gpu.h

70

void (*show)(struct msm_gpu *gpu, struct msm_gpu_state *state,

drivers/gpu/drm/msm/msm_gpu.h

701

struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs,

drivers/gpu/drm/msm/msm_gpu.h

705

msm_gpu_create_private_vm(struct msm_gpu *gpu, struct task_struct *task,

drivers/gpu/drm/msm/msm_gpu.h

708

void msm_gpu_cleanup(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

710

struct msm_gpu *adreno_load_gpu(struct drm_device *dev);

drivers/gpu/drm/msm/msm_gpu.h

721

static inline struct msm_gpu_state *msm_gpu_crashstate_get(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.h

73

void (*debugfs_init)(struct msm_gpu *gpu, struct drm_minor *minor);

drivers/gpu/drm/msm/msm_gpu.h

737

static inline void msm_gpu_crashstate_put(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu.h

749

void msm_gpu_fault_crashstate_capture(struct msm_gpu *gpu, struct msm_gpu_fault_info *fault_info);

drivers/gpu/drm/msm/msm_gpu.h

76

u64 (*gpu_busy)(struct msm_gpu *gpu, unsigned long *out_sample_rate);

drivers/gpu/drm/msm/msm_gpu.h

77

struct msm_gpu_state *(*gpu_state_get)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

79

unsigned long (*gpu_get_freq)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu.h

81

void (*gpu_set_freq)(struct msm_gpu *gpu, struct dev_pm_opp *opp,

drivers/gpu/drm/msm/msm_gpu.h

83

struct drm_gpuvm *(*create_vm)(struct msm_gpu *gpu, struct platform_device *pdev);

drivers/gpu/drm/msm/msm_gpu.h

84

struct drm_gpuvm *(*create_private_vm)(struct msm_gpu *gpu, bool kernel_managed);

drivers/gpu/drm/msm/msm_gpu.h

85

uint32_t (*get_rptr)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);

drivers/gpu/drm/msm/msm_gpu.h

94

bool (*progress)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);

drivers/gpu/drm/msm/msm_gpu.h

95

void (*sysprof_setup)(struct msm_gpu *gpu);

drivers/gpu/drm/msm/msm_gpu_devfreq.c

133

static bool has_devfreq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

139

void msm_devfreq_init(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

217

void msm_devfreq_cleanup(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

22

struct msm_gpu *gpu = dev_to_gpu(dev);

drivers/gpu/drm/msm/msm_gpu_devfreq.c

228

void msm_devfreq_resume(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

245

void msm_devfreq_suspend(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

270

void msm_devfreq_boost(struct msm_gpu *gpu, unsigned factor)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

294

void msm_devfreq_active(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

345

struct msm_gpu *gpu = container_of(df, struct msm_gpu, devfreq);

drivers/gpu/drm/msm/msm_gpu_devfreq.c

366

void msm_devfreq_idle(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

59

static unsigned long get_freq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/msm_gpu_devfreq.c

80

struct msm_gpu *gpu = dev_to_gpu(dev);

drivers/gpu/drm/msm/msm_iommu.c

773

struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsigned long quirks)

drivers/gpu/drm/msm/msm_mmu.h

14

struct msm_gpu;

drivers/gpu/drm/msm/msm_mmu.h

78

struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsigned long quirks);

drivers/gpu/drm/msm/msm_perf.c

155

struct msm_gpu *gpu = priv->gpu;

drivers/gpu/drm/msm/msm_perf.c

61

struct msm_gpu *gpu = priv->gpu;

drivers/gpu/drm/msm/msm_rd.c

175

struct msm_gpu *gpu = priv->gpu;

drivers/gpu/drm/msm/msm_ringbuffer.c

18

struct msm_gpu *gpu = submit->gpu;

drivers/gpu/drm/msm/msm_ringbuffer.c

65

struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,

drivers/gpu/drm/msm/msm_ringbuffer.h

122

struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,

drivers/gpu/drm/msm/msm_ringbuffer.h

48

struct msm_gpu *gpu;

drivers/gpu/drm/msm/msm_submitqueue.c

10

int msm_context_set_sysprof(struct msm_context *ctx, struct msm_gpu *gpu, int sysprof)