arch/powerpc/include/asm/kvm_host.h

316

struct openpic *mpic;

arch/powerpc/include/asm/kvm_host.h

805

struct openpic *mpic; /* KVM_IRQ_MPIC */

arch/powerpc/include/asm/mpic.h

332

struct mpic *next;

arch/powerpc/include/asm/mpic.h

427

extern struct mpic *mpic_alloc(struct device_node *node,

arch/powerpc/include/asm/mpic.h

440

extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,

arch/powerpc/include/asm/mpic.h

447

extern void mpic_init(struct mpic *mpic);

arch/powerpc/include/asm/mpic.h

488

extern unsigned int mpic_get_one_irq(struct mpic *mpic);

arch/powerpc/kernel/prom_init.c

2848

phandle u3, i2c, mpic;

arch/powerpc/kernel/prom_init.c

2860

mpic = call_prom("finddevice", 1, 1, ADDR("/u3@0,f8000000/mpic@f8040000"));

arch/powerpc/kernel/prom_init.c

2861

if (!PHANDLE_VALID(mpic))

arch/powerpc/kernel/prom_init.c

2881

parent = (u32)mpic;

arch/powerpc/kvm/mpic.c

1178

struct openpic *opp = vcpu->arch.mpic;

arch/powerpc/kvm/mpic.c

1635

dev->kvm->arch.mpic = NULL;

arch/powerpc/kvm/mpic.c

1661

if (dev->kvm->arch.mpic)

arch/powerpc/kvm/mpic.c

1714

dev->kvm->arch.mpic = opp;

arch/powerpc/kvm/mpic.c

1759

vcpu->arch.mpic = opp;

arch/powerpc/kvm/mpic.c

1795

struct openpic *opp = kvm->arch.mpic;

arch/powerpc/kvm/mpic.c

1809

struct openpic *opp = kvm->arch.mpic;

arch/powerpc/kvm/mpic.c

1818

openpic_msi_write(kvm->arch.mpic, MSIIR_OFFSET, e->msi.data);

arch/powerpc/kvm/powerpc.c

2003

if (kvm->arch.mpic)

arch/powerpc/kvm/powerpc.c

2139

ret = ret || (kvm->arch.mpic != NULL);

arch/powerpc/kvm/powerpc.c

794

kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu);

arch/powerpc/platforms/44x/iss4xx.c

70

struct mpic *mpic = mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC ");

arch/powerpc/platforms/44x/iss4xx.c

71

BUG_ON(mpic == NULL);

arch/powerpc/platforms/44x/iss4xx.c

72

mpic_init(mpic);

arch/powerpc/platforms/44x/ppc476.c

137

struct mpic *mpic =

arch/powerpc/platforms/44x/ppc476.c

139

BUG_ON(mpic == NULL);

arch/powerpc/platforms/44x/ppc476.c

140

mpic_init(mpic);

arch/powerpc/platforms/85xx/bsc913x_qds.c

24

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/85xx/bsc913x_qds.c

28

if (!mpic)

arch/powerpc/platforms/85xx/bsc913x_qds.c

31

mpic_init(mpic);

arch/powerpc/platforms/85xx/bsc913x_rdb.c

20

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/85xx/bsc913x_rdb.c

24

if (!mpic)

arch/powerpc/platforms/85xx/bsc913x_rdb.c

27

mpic_init(mpic);

arch/powerpc/platforms/85xx/c293pcie.c

23

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/85xx/c293pcie.c

26

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/c293pcie.c

28

mpic_init(mpic);

arch/powerpc/platforms/85xx/corenet_generic.c

35

struct mpic *mpic;

arch/powerpc/platforms/85xx/corenet_generic.c

42

mpic = mpic_alloc(NULL, 0, flags, 0, 512, " OpenPIC ");

arch/powerpc/platforms/85xx/corenet_generic.c

43

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/corenet_generic.c

45

mpic_init(mpic);

arch/powerpc/platforms/85xx/ge_imp3a.c

43

struct mpic *mpic;

arch/powerpc/platforms/85xx/ge_imp3a.c

48

mpic = mpic_alloc(NULL, 0,

arch/powerpc/platforms/85xx/ge_imp3a.c

54

mpic = mpic_alloc(NULL, 0,

arch/powerpc/platforms/85xx/ge_imp3a.c

60

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/ge_imp3a.c

61

mpic_init(mpic);

arch/powerpc/platforms/85xx/ksi8560.c

59

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,

arch/powerpc/platforms/85xx/ksi8560.c

61

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/ksi8560.c

62

mpic_init(mpic);

arch/powerpc/platforms/85xx/mpc8536_ds.c

32

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,

arch/powerpc/platforms/85xx/mpc8536_ds.c

34

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/mpc8536_ds.c

35

mpic_init(mpic);

arch/powerpc/platforms/85xx/mpc85xx_ds.c

39

struct mpic *mpic;

arch/powerpc/platforms/85xx/mpc85xx_ds.c

45

mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");

arch/powerpc/platforms/85xx/mpc85xx_ds.c

47

if (WARN_ON(!mpic))

arch/powerpc/platforms/85xx/mpc85xx_ds.c

50

mpic_init(mpic);

arch/powerpc/platforms/85xx/mpc85xx_mds.c

327

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/85xx/mpc85xx_mds.c

330

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/mpc85xx_mds.c

332

mpic_init(mpic);

arch/powerpc/platforms/85xx/mpc85xx_rdb.c

35

struct mpic *mpic;

arch/powerpc/platforms/85xx/mpc85xx_rdb.c

41

mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");

arch/powerpc/platforms/85xx/mpc85xx_rdb.c

43

if (WARN_ON(!mpic))

arch/powerpc/platforms/85xx/mpc85xx_rdb.c

46

mpic_init(mpic);

arch/powerpc/platforms/85xx/mvme2500.c

26

struct mpic *mpic = mpic_alloc(NULL, 0,

arch/powerpc/platforms/85xx/mvme2500.c

29

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/mvme2500.c

30

mpic_init(mpic);

arch/powerpc/platforms/85xx/p1010rdb.c

29

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/85xx/p1010rdb.c

33

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/p1010rdb.c

35

mpic_init(mpic);

arch/powerpc/platforms/85xx/p1022_ds.c

437

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/85xx/p1022_ds.c

440

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/p1022_ds.c

441

mpic_init(mpic);

arch/powerpc/platforms/85xx/p1022_rdk.c

101

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/85xx/p1022_rdk.c

104

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/p1022_rdk.c

105

mpic_init(mpic);

arch/powerpc/platforms/85xx/p1023_rdb.c

87

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/85xx/p1023_rdb.c

91

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/p1023_rdb.c

93

mpic_init(mpic);

arch/powerpc/platforms/85xx/p2020.c

26

struct mpic *mpic;

arch/powerpc/platforms/85xx/p2020.c

29

mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");

arch/powerpc/platforms/85xx/p2020.c

31

if (WARN_ON(!mpic))

arch/powerpc/platforms/85xx/p2020.c

34

mpic_init(mpic);

arch/powerpc/platforms/85xx/ppa8548.c

29

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,

arch/powerpc/platforms/85xx/ppa8548.c

31

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/ppa8548.c

32

mpic_init(mpic);

arch/powerpc/platforms/85xx/qemu_e500.c

30

struct mpic *mpic;

arch/powerpc/platforms/85xx/qemu_e500.c

34

mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");

arch/powerpc/platforms/85xx/qemu_e500.c

36

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/qemu_e500.c

37

mpic_init(mpic);

arch/powerpc/platforms/85xx/socrates.c

45

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,

arch/powerpc/platforms/85xx/socrates.c

47

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/socrates.c

48

mpic_init(mpic);

arch/powerpc/platforms/85xx/stx_gp3.c

45

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,

arch/powerpc/platforms/85xx/stx_gp3.c

47

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/stx_gp3.c

48

mpic_init(mpic);

arch/powerpc/platforms/85xx/tqm85xx.c

43

struct mpic *mpic = mpic_alloc(NULL, 0,

arch/powerpc/platforms/85xx/tqm85xx.c

46

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/tqm85xx.c

47

mpic_init(mpic);

arch/powerpc/platforms/85xx/twr_p102x.c

32

struct mpic *mpic;

arch/powerpc/platforms/85xx/twr_p102x.c

34

mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/85xx/twr_p102x.c

38

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/twr_p102x.c

39

mpic_init(mpic);

arch/powerpc/platforms/85xx/xes_mpc85xx.c

42

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,

arch/powerpc/platforms/85xx/xes_mpc85xx.c

44

BUG_ON(mpic == NULL);

arch/powerpc/platforms/85xx/xes_mpc85xx.c

45

mpic_init(mpic);

arch/powerpc/platforms/86xx/pic.c

38

struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/86xx/pic.c

41

BUG_ON(mpic == NULL);

arch/powerpc/platforms/86xx/pic.c

43

mpic_init(mpic);

arch/powerpc/platforms/chrp/setup.c

60

static struct mpic *chrp_mpic;

arch/powerpc/platforms/embedded6xx/holly.c

153

struct mpic *mpic;

arch/powerpc/platforms/embedded6xx/holly.c

160

mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |

arch/powerpc/platforms/embedded6xx/holly.c

165

BUG_ON(mpic == NULL);

arch/powerpc/platforms/embedded6xx/holly.c

167

mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);

arch/powerpc/platforms/embedded6xx/holly.c

169

mpic_init(mpic);

arch/powerpc/platforms/embedded6xx/holly.c

187

irq_set_handler_data(cascade_pci_irq, mpic);

arch/powerpc/platforms/embedded6xx/linkstation.c

100

mpic_init(mpic);

arch/powerpc/platforms/embedded6xx/linkstation.c

86

struct mpic *mpic;

arch/powerpc/platforms/embedded6xx/linkstation.c

88

mpic = mpic_alloc(NULL, 0, 0, 4, 0, " EPIC ");

arch/powerpc/platforms/embedded6xx/linkstation.c

89

BUG_ON(mpic == NULL);

arch/powerpc/platforms/embedded6xx/linkstation.c

92

mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200);

arch/powerpc/platforms/embedded6xx/linkstation.c

95

mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000);

arch/powerpc/platforms/embedded6xx/linkstation.c

98

mpic_assign_isu(mpic, 2, mpic->paddr + 0x11100);

arch/powerpc/platforms/embedded6xx/mvme5100.c

54

struct mpic *mpic;

arch/powerpc/platforms/embedded6xx/mvme5100.c

67

mpic = mpic_alloc(np, pci_membase, 0, 16, 256, " OpenPIC ");

arch/powerpc/platforms/embedded6xx/mvme5100.c

69

BUG_ON(mpic == NULL);

arch/powerpc/platforms/embedded6xx/mvme5100.c

72

mpic_assign_isu(mpic, 0, pci_membase + 0x10000);

arch/powerpc/platforms/embedded6xx/mvme5100.c

74

mpic_init(mpic);

arch/powerpc/platforms/embedded6xx/storcenter.c

86

struct mpic *mpic;

arch/powerpc/platforms/embedded6xx/storcenter.c

88

mpic = mpic_alloc(NULL, 0, 0, 16, 0, " OpenPIC ");

arch/powerpc/platforms/embedded6xx/storcenter.c

89

BUG_ON(mpic == NULL);

arch/powerpc/platforms/embedded6xx/storcenter.c

95

mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200);

arch/powerpc/platforms/embedded6xx/storcenter.c

96

mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000);

arch/powerpc/platforms/embedded6xx/storcenter.c

98

mpic_init(mpic);

arch/powerpc/platforms/pasemi/msi.c

134

int __init mpic_pasemi_msi_init(struct mpic *mpic)

arch/powerpc/platforms/pasemi/msi.c

140

of_node = irq_domain_get_of_node(mpic->irqhost);

arch/powerpc/platforms/pasemi/msi.c

146

rc = mpic_msi_init_allocator(mpic);

arch/powerpc/platforms/pasemi/msi.c

154

msi_mpic = mpic;

arch/powerpc/platforms/pasemi/msi.c

31

static struct mpic *msi_mpic;

arch/powerpc/platforms/pasemi/setup.c

217

static void __init nemo_init_IRQ(struct mpic *mpic)

arch/powerpc/platforms/pasemi/setup.c

231

irq_set_default_domain(mpic->irqhost);

arch/powerpc/platforms/pasemi/setup.c

236

static inline void nemo_init_IRQ(struct mpic *mpic)

arch/powerpc/platforms/pasemi/setup.c

250

struct mpic *mpic;

arch/powerpc/platforms/pasemi/setup.c

287

mpic = mpic_alloc(mpic_node, openpic_addr,

arch/powerpc/platforms/pasemi/setup.c

289

BUG_ON(!mpic);

arch/powerpc/platforms/pasemi/setup.c

291

mpic_assign_isu(mpic, 0, mpic->paddr + 0x10000);

arch/powerpc/platforms/pasemi/setup.c

292

mpic_init(mpic);

arch/powerpc/platforms/pasemi/setup.c

301

nemo_init_IRQ(mpic);

arch/powerpc/platforms/powermac/pic.c

425

static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)

arch/powerpc/platforms/powermac/pic.c

445

static struct mpic * __init pmac_setup_one_mpic(struct device_node *np,

arch/powerpc/platforms/powermac/pic.c

449

struct mpic *mpic;

arch/powerpc/platforms/powermac/pic.c

463

mpic = mpic_alloc(np, 0, flags, 0, 0, name);

arch/powerpc/platforms/powermac/pic.c

464

if (mpic == NULL)

arch/powerpc/platforms/powermac/pic.c

467

mpic_init(mpic);

arch/powerpc/platforms/powermac/pic.c

469

return mpic;

arch/powerpc/platforms/powermac/pic.c

474

struct mpic *mpic1, *mpic2;

arch/powerpc/sysdev/fsl_mpic_err.c

103

eisr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EISR);

arch/powerpc/sysdev/fsl_mpic_err.c

104

eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);

arch/powerpc/sysdev/fsl_mpic_err.c

112

ret = generic_handle_domain_irq(mpic->irqhost,

arch/powerpc/sysdev/fsl_mpic_err.c

113

mpic->err_int_vecs[errint]);

arch/powerpc/sysdev/fsl_mpic_err.c

116

mpic_fsl_err_write(mpic->err_regs, eimr);

arch/powerpc/sysdev/fsl_mpic_err.c

124

void __init mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)

arch/powerpc/sysdev/fsl_mpic_err.c

129

virq = irq_create_mapping(mpic->irqhost, irqnum);

arch/powerpc/sysdev/fsl_mpic_err.c

136

mpic_fsl_err_write(mpic->err_regs, ~0);

arch/powerpc/sysdev/fsl_mpic_err.c

139

"mpic-error-int", mpic);

arch/powerpc/sysdev/fsl_mpic_err.c

36

struct mpic *mpic = irq_data_get_irq_chip_data(d);

arch/powerpc/sysdev/fsl_mpic_err.c

37

unsigned int src = virq_to_hw(d->irq) - mpic->err_int_vecs[0];

arch/powerpc/sysdev/fsl_mpic_err.c

39

eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);

arch/powerpc/sysdev/fsl_mpic_err.c

41

mpic_fsl_err_write(mpic->err_regs, eimr);

arch/powerpc/sysdev/fsl_mpic_err.c

47

struct mpic *mpic = irq_data_get_irq_chip_data(d);

arch/powerpc/sysdev/fsl_mpic_err.c

48

unsigned int src = virq_to_hw(d->irq) - mpic->err_int_vecs[0];

arch/powerpc/sysdev/fsl_mpic_err.c

50

eimr = mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);

arch/powerpc/sysdev/fsl_mpic_err.c

52

mpic_fsl_err_write(mpic->err_regs, eimr);

arch/powerpc/sysdev/fsl_mpic_err.c

61

int __init mpic_setup_error_int(struct mpic *mpic, int intvec)

arch/powerpc/sysdev/fsl_mpic_err.c

65

mpic->err_regs = ioremap(mpic->paddr + MPIC_ERR_INT_BASE, 0x1000);

arch/powerpc/sysdev/fsl_mpic_err.c

66

if (!mpic->err_regs) {

arch/powerpc/sysdev/fsl_mpic_err.c

70

mpic->hc_err = fsl_mpic_err_chip;

arch/powerpc/sysdev/fsl_mpic_err.c

71

mpic->hc_err.name = mpic->name;

arch/powerpc/sysdev/fsl_mpic_err.c

72

mpic->flags |= MPIC_FSL_HAS_EIMR;

arch/powerpc/sysdev/fsl_mpic_err.c

75

mpic->err_int_vecs[i] = intvec--;

arch/powerpc/sysdev/fsl_mpic_err.c

80

int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw)

arch/powerpc/sysdev/fsl_mpic_err.c

82

if ((mpic->flags & MPIC_FSL_HAS_EIMR) &&

arch/powerpc/sysdev/fsl_mpic_err.c

83

(hw >= mpic->err_int_vecs[0] &&

arch/powerpc/sysdev/fsl_mpic_err.c

84

hw <= mpic->err_int_vecs[MPIC_MAX_ERR - 1])) {

arch/powerpc/sysdev/fsl_mpic_err.c

85

WARN_ON(mpic->flags & MPIC_SECONDARY);

arch/powerpc/sysdev/fsl_mpic_err.c

88

irq_set_chip_data(virq, mpic);

arch/powerpc/sysdev/fsl_mpic_err.c

89

irq_set_chip_and_handler(virq, &mpic->hc_err,

arch/powerpc/sysdev/fsl_mpic_err.c

99

struct mpic *mpic = (struct mpic *) data;

arch/powerpc/sysdev/mpic.c

1006

struct mpic *mpic = h->host_data;

arch/powerpc/sysdev/mpic.c

1011

if (hw == mpic->spurious_vec)

arch/powerpc/sysdev/mpic.c

1013

if (mpic->protected && test_bit(hw, mpic->protected)) {

arch/powerpc/sysdev/mpic.c

1020

else if (hw >= mpic->ipi_vecs[0]) {

arch/powerpc/sysdev/mpic.c

1021

WARN_ON(mpic->flags & MPIC_SECONDARY);

arch/powerpc/sysdev/mpic.c

1024

irq_set_chip_data(virq, mpic);

arch/powerpc/sysdev/mpic.c

1025

irq_set_chip_and_handler(virq, &mpic->hc_ipi,

arch/powerpc/sysdev/mpic.c

1031

if (hw >= mpic->timer_vecs[0] && hw <= mpic->timer_vecs[7]) {

arch/powerpc/sysdev/mpic.c

1032

WARN_ON(mpic->flags & MPIC_SECONDARY);

arch/powerpc/sysdev/mpic.c

1035

irq_set_chip_data(virq, mpic);

arch/powerpc/sysdev/mpic.c

1036

irq_set_chip_and_handler(virq, &mpic->hc_tm,

arch/powerpc/sysdev/mpic.c

1041

if (mpic_map_error_int(mpic, virq, hw))

arch/powerpc/sysdev/mpic.c

1044

if (hw >= mpic->num_sources) {

arch/powerpc/sysdev/mpic.c

1050

mpic_msi_reserve_hwirq(mpic, hw);

arch/powerpc/sysdev/mpic.c

1053

chip = &mpic->hc_irq;

arch/powerpc/sysdev/mpic.c

1057

if (mpic_is_ht_interrupt(mpic, hw))

arch/powerpc/sysdev/mpic.c

1058

chip = &mpic->hc_ht_irq;

arch/powerpc/sysdev/mpic.c

1063

irq_set_chip_data(virq, mpic);

arch/powerpc/sysdev/mpic.c

1073

if (!mpic_is_ipi(mpic, hw) && (mpic->flags & MPIC_NO_RESET)) {

arch/powerpc/sysdev/mpic.c

1077

cpu = mpic_processor_id(mpic);

arch/powerpc/sysdev/mpic.c

1093

struct mpic *mpic = h->host_data;

arch/powerpc/sysdev/mpic.c

1102

if (intsize >= 4 && (mpic->flags & MPIC_FSL)) {

arch/powerpc/sysdev/mpic.c

1114

if (!(mpic->flags & MPIC_FSL_HAS_EIMR))

arch/powerpc/sysdev/mpic.c

1117

if (intspec[3] >= ARRAY_SIZE(mpic->err_int_vecs))

arch/powerpc/sysdev/mpic.c

1120

*out_hwirq = mpic->err_int_vecs[intspec[3]];

arch/powerpc/sysdev/mpic.c

1124

if (intspec[0] >= ARRAY_SIZE(mpic->ipi_vecs))

arch/powerpc/sysdev/mpic.c

1127

*out_hwirq = mpic->ipi_vecs[intspec[0]];

arch/powerpc/sysdev/mpic.c

1130

if (intspec[0] >= ARRAY_SIZE(mpic->timer_vecs))

arch/powerpc/sysdev/mpic.c

1133

*out_hwirq = mpic->timer_vecs[intspec[0]];

arch/powerpc/sysdev/mpic.c

1171

struct mpic *mpic = irq_desc_get_handler_data(desc);

arch/powerpc/sysdev/mpic.c

1174

BUG_ON(!(mpic->flags & MPIC_SECONDARY));

arch/powerpc/sysdev/mpic.c

1176

virq = mpic_get_one_irq(mpic);

arch/powerpc/sysdev/mpic.c

1189

static u32 fsl_mpic_get_version(struct mpic *mpic)

arch/powerpc/sysdev/mpic.c

1193

if (!(mpic->flags & MPIC_FSL))

arch/powerpc/sysdev/mpic.c

1196

brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,

arch/powerpc/sysdev/mpic.c

1208

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1210

if (mpic)

arch/powerpc/sysdev/mpic.c

1211

return fsl_mpic_get_version(mpic);

arch/powerpc/sysdev/mpic.c

1216

struct mpic * __init mpic_alloc(struct device_node *node,

arch/powerpc/sysdev/mpic.c

1224

struct mpic *mpic;

arch/powerpc/sysdev/mpic.c

1276

mpic = kzalloc_obj(struct mpic);

arch/powerpc/sysdev/mpic.c

1277

if (mpic == NULL)

arch/powerpc/sysdev/mpic.c

1280

mpic->name = name;

arch/powerpc/sysdev/mpic.c

1281

mpic->node = node;

arch/powerpc/sysdev/mpic.c

1282

mpic->paddr = phys_addr;

arch/powerpc/sysdev/mpic.c

1283

mpic->flags = flags;

arch/powerpc/sysdev/mpic.c

1285

mpic->hc_irq = mpic_irq_chip;

arch/powerpc/sysdev/mpic.c

1286

mpic->hc_irq.name = name;

arch/powerpc/sysdev/mpic.c

1287

if (!(mpic->flags & MPIC_SECONDARY))

arch/powerpc/sysdev/mpic.c

1288

mpic->hc_irq.irq_set_affinity = mpic_set_affinity;

arch/powerpc/sysdev/mpic.c

1290

mpic->hc_ht_irq = mpic_irq_ht_chip;

arch/powerpc/sysdev/mpic.c

1291

mpic->hc_ht_irq.name = name;

arch/powerpc/sysdev/mpic.c

1292

if (!(mpic->flags & MPIC_SECONDARY))

arch/powerpc/sysdev/mpic.c

1293

mpic->hc_ht_irq.irq_set_affinity = mpic_set_affinity;

arch/powerpc/sysdev/mpic.c

1297

mpic->hc_ipi = mpic_ipi_chip;

arch/powerpc/sysdev/mpic.c

1298

mpic->hc_ipi.name = name;

arch/powerpc/sysdev/mpic.c

1301

mpic->hc_tm = mpic_tm_chip;

arch/powerpc/sysdev/mpic.c

1302

mpic->hc_tm.name = name;

arch/powerpc/sysdev/mpic.c

1304

mpic->num_sources = 0; /* so far */

arch/powerpc/sysdev/mpic.c

1306

if (mpic->flags & MPIC_LARGE_VECTORS)

arch/powerpc/sysdev/mpic.c

1311

mpic->timer_vecs[0] = intvec_top - 12;

arch/powerpc/sysdev/mpic.c

1312

mpic->timer_vecs[1] = intvec_top - 11;

arch/powerpc/sysdev/mpic.c

1313

mpic->timer_vecs[2] = intvec_top - 10;

arch/powerpc/sysdev/mpic.c

1314

mpic->timer_vecs[3] = intvec_top - 9;

arch/powerpc/sysdev/mpic.c

1315

mpic->timer_vecs[4] = intvec_top - 8;

arch/powerpc/sysdev/mpic.c

1316

mpic->timer_vecs[5] = intvec_top - 7;

arch/powerpc/sysdev/mpic.c

1317

mpic->timer_vecs[6] = intvec_top - 6;

arch/powerpc/sysdev/mpic.c

1318

mpic->timer_vecs[7] = intvec_top - 5;

arch/powerpc/sysdev/mpic.c

1319

mpic->ipi_vecs[0] = intvec_top - 4;

arch/powerpc/sysdev/mpic.c

1320

mpic->ipi_vecs[1] = intvec_top - 3;

arch/powerpc/sysdev/mpic.c

1321

mpic->ipi_vecs[2] = intvec_top - 2;

arch/powerpc/sysdev/mpic.c

1322

mpic->ipi_vecs[3] = intvec_top - 1;

arch/powerpc/sysdev/mpic.c

1323

mpic->spurious_vec = intvec_top;

arch/powerpc/sysdev/mpic.c

1326

psrc = of_get_property(mpic->node, "protected-sources", &psize);

arch/powerpc/sysdev/mpic.c

1329

mpic->protected = bitmap_zalloc(intvec_top + 1, GFP_KERNEL);

arch/powerpc/sysdev/mpic.c

1330

BUG_ON(mpic->protected == NULL);

arch/powerpc/sysdev/mpic.c

1334

__set_bit(psrc[i], mpic->protected);

arch/powerpc/sysdev/mpic.c

1339

mpic->hw_set = mpic_infos[MPIC_GET_REGSET(mpic->flags)];

arch/powerpc/sysdev/mpic.c

1343

if (mpic->flags & MPIC_BIG_ENDIAN)

arch/powerpc/sysdev/mpic.c

1344

mpic->reg_type = mpic_access_mmio_be;

arch/powerpc/sysdev/mpic.c

1346

mpic->reg_type = mpic_access_mmio_le;

arch/powerpc/sysdev/mpic.c

1353

if (mpic->flags & MPIC_USES_DCR)

arch/powerpc/sysdev/mpic.c

1354

mpic->reg_type = mpic_access_dcr;

arch/powerpc/sysdev/mpic.c

1356

BUG_ON(mpic->flags & MPIC_USES_DCR);

arch/powerpc/sysdev/mpic.c

1360

mpic_map(mpic, mpic->paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);

arch/powerpc/sysdev/mpic.c

1361

mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);

arch/powerpc/sysdev/mpic.c

1363

if (mpic->flags & MPIC_FSL) {

arch/powerpc/sysdev/mpic.c

1371

mpic_map(mpic, mpic->paddr, &mpic->thiscpuregs,

arch/powerpc/sysdev/mpic.c

1374

fsl_version = fsl_mpic_get_version(mpic);

arch/powerpc/sysdev/mpic.c

1390

ret = mpic_setup_error_int(mpic, intvec_top - 13);

arch/powerpc/sysdev/mpic.c

1418

if (!(mpic->flags & MPIC_NO_RESET)) {

arch/powerpc/sysdev/mpic.c

1420

mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),

arch/powerpc/sysdev/mpic.c

1421

mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))

arch/powerpc/sysdev/mpic.c

1423

while( mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))

arch/powerpc/sysdev/mpic.c

1429

if (mpic->flags & MPIC_ENABLE_COREINT)

arch/powerpc/sysdev/mpic.c

1430

mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),

arch/powerpc/sysdev/mpic.c

1431

mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))

arch/powerpc/sysdev/mpic.c

1434

if (mpic->flags & MPIC_ENABLE_MCK)

arch/powerpc/sysdev/mpic.c

1435

mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),

arch/powerpc/sysdev/mpic.c

1436

mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))

arch/powerpc/sysdev/mpic.c

1449

mpic_map(mpic, mpic->paddr, &mpic->cpuregs[cpu],

arch/powerpc/sysdev/mpic.c

1458

greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0));

arch/powerpc/sysdev/mpic.c

1470

of_property_read_u32(mpic->node, "last-interrupt-source", &last_irq);

arch/powerpc/sysdev/mpic.c

1477

mpic->num_sources = isu_size;

arch/powerpc/sysdev/mpic.c

1478

mpic_map(mpic, mpic->paddr, &mpic->isus[0],

arch/powerpc/sysdev/mpic.c

1483

mpic->isu_size = isu_size;

arch/powerpc/sysdev/mpic.c

1484

mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);

arch/powerpc/sysdev/mpic.c

1485

mpic->isu_mask = (1 << mpic->isu_shift) - 1;

arch/powerpc/sysdev/mpic.c

1487

mpic->irqhost = irq_domain_create_linear(of_fwnode_handle(mpic->node),

arch/powerpc/sysdev/mpic.c

1489

&mpic_host_ops, mpic);

arch/powerpc/sysdev/mpic.c

1495

if (mpic->irqhost == NULL)

arch/powerpc/sysdev/mpic.c

1515

name, vers, (unsigned long long)mpic->paddr, num_possible_cpus());

arch/powerpc/sysdev/mpic.c

1517

mpic->isu_size, mpic->isu_shift, mpic->isu_mask);

arch/powerpc/sysdev/mpic.c

1519

mpic->next = mpics;

arch/powerpc/sysdev/mpic.c

1520

mpics = mpic;

arch/powerpc/sysdev/mpic.c

1522

if (!(mpic->flags & MPIC_SECONDARY)) {

arch/powerpc/sysdev/mpic.c

1523

mpic_primary = mpic;

arch/powerpc/sysdev/mpic.c

1524

irq_set_default_domain(mpic->irqhost);

arch/powerpc/sysdev/mpic.c

1527

return mpic;

arch/powerpc/sysdev/mpic.c

153

#define MPIC_INFO(name) mpic->hw_set[MPIC_IDX_##name]

arch/powerpc/sysdev/mpic.c

1534

void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,

arch/powerpc/sysdev/mpic.c

1537

unsigned int isu_first = isu_num * mpic->isu_size;

arch/powerpc/sysdev/mpic.c

1541

mpic_map(mpic,

arch/powerpc/sysdev/mpic.c

1542

paddr, &mpic->isus[isu_num], 0,

arch/powerpc/sysdev/mpic.c

1543

MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);

arch/powerpc/sysdev/mpic.c

1545

if ((isu_first + mpic->isu_size) > mpic->num_sources)

arch/powerpc/sysdev/mpic.c

1546

mpic->num_sources = isu_first + mpic->isu_size;

arch/powerpc/sysdev/mpic.c

1549

void __init mpic_init(struct mpic *mpic)

arch/powerpc/sysdev/mpic.c

1554

BUG_ON(mpic->num_sources == 0);

arch/powerpc/sysdev/mpic.c

1556

printk(KERN_INFO "mpic: Initializing for %d sources\n", mpic->num_sources);

arch/powerpc/sysdev/mpic.c

1561

if (mpic->flags & MPIC_FSL) {

arch/powerpc/sysdev/mpic.c

1562

u32 version = fsl_mpic_get_version(mpic);

arch/powerpc/sysdev/mpic.c

1576

unsigned int offset = mpic_tm_offset(mpic, i);

arch/powerpc/sysdev/mpic.c

1578

mpic_write(mpic->tmregs,

arch/powerpc/sysdev/mpic.c

1581

mpic_write(mpic->tmregs,

arch/powerpc/sysdev/mpic.c

1585

(mpic->timer_vecs[0] + i));

arch/powerpc/sysdev/mpic.c

1589

mpic_test_broken_ipi(mpic);

arch/powerpc/sysdev/mpic.c

1594

(mpic->ipi_vecs[0] + i));

arch/powerpc/sysdev/mpic.c

1598

DBG("MPIC flags: %x\n", mpic->flags);

arch/powerpc/sysdev/mpic.c

1599

if ((mpic->flags & MPIC_U3_HT_IRQS) && !(mpic->flags & MPIC_SECONDARY)) {

arch/powerpc/sysdev/mpic.c

1600

mpic_scan_ht_pics(mpic);

arch/powerpc/sysdev/mpic.c

1601

mpic_u3msi_init(mpic);

arch/powerpc/sysdev/mpic.c

1604

mpic_pasemi_msi_init(mpic);

arch/powerpc/sysdev/mpic.c

1606

cpu = mpic_processor_id(mpic);

arch/powerpc/sysdev/mpic.c

1608

if (!(mpic->flags & MPIC_NO_RESET)) {

arch/powerpc/sysdev/mpic.c

1609

for (i = 0; i < mpic->num_sources; i++) {

arch/powerpc/sysdev/mpic.c

161

static inline unsigned int mpic_processor_id(struct mpic *mpic)

arch/powerpc/sysdev/mpic.c

1615

if (mpic->protected && test_bit(i, mpic->protected))

arch/powerpc/sysdev/mpic.c

1624

mpic_write(mpic->gregs, MPIC_INFO(GREG_SPURIOUS), mpic->spurious_vec);

arch/powerpc/sysdev/mpic.c

1627

if (!(mpic->flags & MPIC_NO_PTHROU_DIS))

arch/powerpc/sysdev/mpic.c

1628

mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),

arch/powerpc/sysdev/mpic.c

1629

mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))

arch/powerpc/sysdev/mpic.c

1632

if (mpic->flags & MPIC_NO_BIAS)

arch/powerpc/sysdev/mpic.c

1633

mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),

arch/powerpc/sysdev/mpic.c

1634

mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))

arch/powerpc/sysdev/mpic.c

1642

mpic->save_data = kmalloc_objs(*mpic->save_data, mpic->num_sources);

arch/powerpc/sysdev/mpic.c

1643

BUG_ON(mpic->save_data == NULL);

arch/powerpc/sysdev/mpic.c

1647

if (mpic->flags & MPIC_SECONDARY) {

arch/powerpc/sysdev/mpic.c

1648

int virq = irq_of_parse_and_map(mpic->node, 0);

arch/powerpc/sysdev/mpic.c

165

if (!(mpic->flags & MPIC_SECONDARY))

arch/powerpc/sysdev/mpic.c

1651

mpic->node, virq);

arch/powerpc/sysdev/mpic.c

1652

irq_set_handler_data(virq, mpic);

arch/powerpc/sysdev/mpic.c

1658

if (mpic->flags & MPIC_FSL_HAS_EIMR)

arch/powerpc/sysdev/mpic.c

1659

mpic_err_int_init(mpic, MPIC_FSL_ERR_INT);

arch/powerpc/sysdev/mpic.c

1664

struct mpic *mpic = mpic_find(irq);

arch/powerpc/sysdev/mpic.c

1669

if (!mpic)

arch/powerpc/sysdev/mpic.c

1673

if (mpic_is_ipi(mpic, src)) {

arch/powerpc/sysdev/mpic.c

1674

reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) &

arch/powerpc/sysdev/mpic.c

1676

mpic_ipi_write(src - mpic->ipi_vecs[0],

arch/powerpc/sysdev/mpic.c

1678

} else if (mpic_is_tm(mpic, src)) {

arch/powerpc/sysdev/mpic.c

1679

reg = mpic_tm_read(src - mpic->timer_vecs[0]) &

arch/powerpc/sysdev/mpic.c

1681

mpic_tm_write(src - mpic->timer_vecs[0],

arch/powerpc/sysdev/mpic.c

1695

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1700

BUG_ON(mpic == NULL);

arch/powerpc/sysdev/mpic.c

1702

DBG("%s: setup_this_cpu(%d)\n", mpic->name, hard_smp_processor_id());

arch/powerpc/sysdev/mpic.c

1711

if (distribute_irqs && !(mpic->flags & MPIC_SINGLE_DEST_CPU)) {

arch/powerpc/sysdev/mpic.c

1712

for (i = 0; i < mpic->num_sources ; i++)

arch/powerpc/sysdev/mpic.c

1726

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1733

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1741

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1746

BUG_ON(mpic == NULL);

arch/powerpc/sysdev/mpic.c

1748

DBG("%s: teardown_this_cpu(%d)\n", mpic->name, hard_smp_processor_id());

arch/powerpc/sysdev/mpic.c

1752

for (i = 0; i < mpic->num_sources ; i++)

arch/powerpc/sysdev/mpic.c

1761

mpic_eoi(mpic);

arch/powerpc/sysdev/mpic.c

1767

static unsigned int _mpic_get_one_irq(struct mpic *mpic, int reg)

arch/powerpc/sysdev/mpic.c

1773

DBG("%s: get_one_irq(reg 0x%x): %d\n", mpic->name, reg, src);

arch/powerpc/sysdev/mpic.c

1775

if (unlikely(src == mpic->spurious_vec)) {

arch/powerpc/sysdev/mpic.c

1776

if (mpic->flags & MPIC_SPV_EOI)

arch/powerpc/sysdev/mpic.c

1777

mpic_eoi(mpic);

arch/powerpc/sysdev/mpic.c

1780

if (unlikely(mpic->protected && test_bit(src, mpic->protected))) {

arch/powerpc/sysdev/mpic.c

1782

mpic->name, (int)src);

arch/powerpc/sysdev/mpic.c

1783

mpic_eoi(mpic);

arch/powerpc/sysdev/mpic.c

1787

return irq_find_mapping(mpic->irqhost, src);

arch/powerpc/sysdev/mpic.c

1790

unsigned int mpic_get_one_irq(struct mpic *mpic)

arch/powerpc/sysdev/mpic.c

1792

return _mpic_get_one_irq(mpic, MPIC_INFO(CPU_INTACK));

arch/powerpc/sysdev/mpic.c

1797

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1799

BUG_ON(mpic == NULL);

arch/powerpc/sysdev/mpic.c

1801

return mpic_get_one_irq(mpic);

arch/powerpc/sysdev/mpic.c

1807

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1810

BUG_ON(mpic == NULL);

arch/powerpc/sysdev/mpic.c

1814

if (unlikely(src == mpic->spurious_vec)) {

arch/powerpc/sysdev/mpic.c

1815

if (mpic->flags & MPIC_SPV_EOI)

arch/powerpc/sysdev/mpic.c

1816

mpic_eoi(mpic);

arch/powerpc/sysdev/mpic.c

1819

if (unlikely(mpic->protected && test_bit(src, mpic->protected))) {

arch/powerpc/sysdev/mpic.c

1821

mpic->name, (int)src);

arch/powerpc/sysdev/mpic.c

1825

return irq_find_mapping(mpic->irqhost, src);

arch/powerpc/sysdev/mpic.c

1833

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1835

BUG_ON(mpic == NULL);

arch/powerpc/sysdev/mpic.c

1837

return _mpic_get_one_irq(mpic, MPIC_INFO(CPU_MCACK));

arch/powerpc/sysdev/mpic.c

1843

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1845

BUG_ON(mpic == NULL);

arch/powerpc/sysdev/mpic.c

1850

unsigned int vipi = irq_create_mapping(mpic->irqhost,

arch/powerpc/sysdev/mpic.c

1851

mpic->ipi_vecs[0] + i);

arch/powerpc/sysdev/mpic.c

1862

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1865

BUG_ON(mpic == NULL);

arch/powerpc/sysdev/mpic.c

1875

DBG("%s: send_ipi(ipi_no: %d)\n", mpic->name, msg);

arch/powerpc/sysdev/mpic.c

1905

struct mpic *mpic = mpic_primary;

arch/powerpc/sysdev/mpic.c

1911

pir = mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));

arch/powerpc/sysdev/mpic.c

1913

mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir);

arch/powerpc/sysdev/mpic.c

1914

mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));

arch/powerpc/sysdev/mpic.c

1918

mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir);

arch/powerpc/sysdev/mpic.c

1919

mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));

arch/powerpc/sysdev/mpic.c

1923

if (mpic->flags & MPIC_FSL) {

arch/powerpc/sysdev/mpic.c

1925

_mpic_write(mpic->reg_type, &mpic->cpuregs[cpuid],

arch/powerpc/sysdev/mpic.c

1933

static void mpic_suspend_one(struct mpic *mpic)

arch/powerpc/sysdev/mpic.c

1937

for (i = 0; i < mpic->num_sources; i++) {

arch/powerpc/sysdev/mpic.c

1938

mpic->save_data[i].vecprio =

arch/powerpc/sysdev/mpic.c

1940

mpic->save_data[i].dest =

arch/powerpc/sysdev/mpic.c

1947

struct mpic *mpic = mpics;

arch/powerpc/sysdev/mpic.c

1949

while (mpic) {

arch/powerpc/sysdev/mpic.c

1950

mpic_suspend_one(mpic);

arch/powerpc/sysdev/mpic.c

1951

mpic = mpic->next;

arch/powerpc/sysdev/mpic.c

1957

static void mpic_resume_one(struct mpic *mpic)

arch/powerpc/sysdev/mpic.c

1961

for (i = 0; i < mpic->num_sources; i++) {

arch/powerpc/sysdev/mpic.c

1963

mpic->save_data[i].vecprio);

arch/powerpc/sysdev/mpic.c

1965

mpic->save_data[i].dest);

arch/powerpc/sysdev/mpic.c

1968

if (mpic->fixups) {

arch/powerpc/sysdev/mpic.c

1969

struct mpic_irq_fixup *fixup = &mpic->fixups[i];

arch/powerpc/sysdev/mpic.c

1973

if ((mpic->save_data[i].fixup_data & 1) == 0)

arch/powerpc/sysdev/mpic.c

1979

writel(mpic->save_data[i].fixup_data & ~1,

arch/powerpc/sysdev/mpic.c

1989

struct mpic *mpic = mpics;

arch/powerpc/sysdev/mpic.c

1991

while (mpic) {

arch/powerpc/sysdev/mpic.c

1992

mpic_resume_one(mpic);

arch/powerpc/sysdev/mpic.c

1993

mpic = mpic->next;

arch/powerpc/sysdev/mpic.c

213

static inline u32 _mpic_ipi_read(struct mpic *mpic, unsigned int ipi)

arch/powerpc/sysdev/mpic.c

215

enum mpic_reg_type type = mpic->reg_type;

arch/powerpc/sysdev/mpic.c

219

if ((mpic->flags & MPIC_BROKEN_IPI) && type == mpic_access_mmio_le)

arch/powerpc/sysdev/mpic.c

221

return _mpic_read(type, &mpic->gregs, offset);

arch/powerpc/sysdev/mpic.c

224

static inline void _mpic_ipi_write(struct mpic *mpic, unsigned int ipi, u32 value)

arch/powerpc/sysdev/mpic.c

229

_mpic_write(mpic->reg_type, &mpic->gregs, offset, value);

arch/powerpc/sysdev/mpic.c

232

static inline unsigned int mpic_tm_offset(struct mpic *mpic, unsigned int tm)

arch/powerpc/sysdev/mpic.c

238

static inline u32 _mpic_tm_read(struct mpic *mpic, unsigned int tm)

arch/powerpc/sysdev/mpic.c

240

unsigned int offset = mpic_tm_offset(mpic, tm) +

arch/powerpc/sysdev/mpic.c

243

return _mpic_read(mpic->reg_type, &mpic->tmregs, offset);

arch/powerpc/sysdev/mpic.c

246

static inline void _mpic_tm_write(struct mpic *mpic, unsigned int tm, u32 value)

arch/powerpc/sysdev/mpic.c

248

unsigned int offset = mpic_tm_offset(mpic, tm) +

arch/powerpc/sysdev/mpic.c

251

_mpic_write(mpic->reg_type, &mpic->tmregs, offset, value);

arch/powerpc/sysdev/mpic.c

254

static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg)

arch/powerpc/sysdev/mpic.c

256

unsigned int cpu = mpic_processor_id(mpic);

arch/powerpc/sysdev/mpic.c

258

return _mpic_read(mpic->reg_type, &mpic->cpuregs[cpu], reg);

arch/powerpc/sysdev/mpic.c

261

static inline void _mpic_cpu_write(struct mpic *mpic, unsigned int reg, u32 value)

arch/powerpc/sysdev/mpic.c

263

unsigned int cpu = mpic_processor_id(mpic);

arch/powerpc/sysdev/mpic.c

265

_mpic_write(mpic->reg_type, &mpic->cpuregs[cpu], reg, value);

arch/powerpc/sysdev/mpic.c

268

static inline u32 _mpic_irq_read(struct mpic *mpic, unsigned int src_no, unsigned int reg)

arch/powerpc/sysdev/mpic.c

270

unsigned int isu = src_no >> mpic->isu_shift;

arch/powerpc/sysdev/mpic.c

271

unsigned int idx = src_no & mpic->isu_mask;

arch/powerpc/sysdev/mpic.c

274

val = _mpic_read(mpic->reg_type, &mpic->isus[isu],

arch/powerpc/sysdev/mpic.c

279

mpic->isu_reg0_shadow[src_no];

arch/powerpc/sysdev/mpic.c

284

static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no,

arch/powerpc/sysdev/mpic.c

287

unsigned int isu = src_no >> mpic->isu_shift;

arch/powerpc/sysdev/mpic.c

288

unsigned int idx = src_no & mpic->isu_mask;

arch/powerpc/sysdev/mpic.c

290

_mpic_write(mpic->reg_type, &mpic->isus[isu],

arch/powerpc/sysdev/mpic.c

295

mpic->isu_reg0_shadow[src_no] =

arch/powerpc/sysdev/mpic.c

300

#define mpic_read(b,r) _mpic_read(mpic->reg_type,&(b),(r))

arch/powerpc/sysdev/mpic.c

301

#define mpic_write(b,r,v) _mpic_write(mpic->reg_type,&(b),(r),(v))

arch/powerpc/sysdev/mpic.c

302

#define mpic_ipi_read(i) _mpic_ipi_read(mpic,(i))

arch/powerpc/sysdev/mpic.c

303

#define mpic_ipi_write(i,v) _mpic_ipi_write(mpic,(i),(v))

arch/powerpc/sysdev/mpic.c

304

#define mpic_tm_read(i) _mpic_tm_read(mpic,(i))

arch/powerpc/sysdev/mpic.c

305

#define mpic_tm_write(i,v) _mpic_tm_write(mpic,(i),(v))

arch/powerpc/sysdev/mpic.c

306

#define mpic_cpu_read(i) _mpic_cpu_read(mpic,(i))

arch/powerpc/sysdev/mpic.c

307

#define mpic_cpu_write(i,v) _mpic_cpu_write(mpic,(i),(v))

arch/powerpc/sysdev/mpic.c

308

#define mpic_irq_read(s,r) _mpic_irq_read(mpic,(s),(r))

arch/powerpc/sysdev/mpic.c

309

#define mpic_irq_write(s,r,v) _mpic_irq_write(mpic,(s),(r),(v))

arch/powerpc/sysdev/mpic.c

317

static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t phys_addr,

arch/powerpc/sysdev/mpic.c

326

static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,

arch/powerpc/sysdev/mpic.c

329

phys_addr_t phys_addr = dcr_resource_start(mpic->node, 0);

arch/powerpc/sysdev/mpic.c

330

rb->dhost = dcr_map(mpic->node, phys_addr + offset, size);

arch/powerpc/sysdev/mpic.c

334

static inline void mpic_map(struct mpic *mpic,

arch/powerpc/sysdev/mpic.c

338

if (mpic->flags & MPIC_USES_DCR)

arch/powerpc/sysdev/mpic.c

339

_mpic_map_dcr(mpic, rb, offset, size);

arch/powerpc/sysdev/mpic.c

341

_mpic_map_mmio(mpic, phys_addr, rb, offset, size);

arch/powerpc/sysdev/mpic.c

352

static void __init mpic_test_broken_ipi(struct mpic *mpic)

arch/powerpc/sysdev/mpic.c

356

mpic_write(mpic->gregs, MPIC_INFO(GREG_IPI_VECTOR_PRI_0), MPIC_VECPRI_MASK);

arch/powerpc/sysdev/mpic.c

357

r = mpic_read(mpic->gregs, MPIC_INFO(GREG_IPI_VECTOR_PRI_0));

arch/powerpc/sysdev/mpic.c

361

mpic->flags |= MPIC_BROKEN_IPI;

arch/powerpc/sysdev/mpic.c

370

static inline int mpic_is_ht_interrupt(struct mpic *mpic, unsigned int source)

arch/powerpc/sysdev/mpic.c

372

if (source >= 128 || !mpic->fixups)

arch/powerpc/sysdev/mpic.c

374

return mpic->fixups[source].base != NULL;

arch/powerpc/sysdev/mpic.c

378

static inline void mpic_ht_end_irq(struct mpic *mpic, unsigned int source)

arch/powerpc/sysdev/mpic.c

380

struct mpic_irq_fixup *fixup = &mpic->fixups[source];

arch/powerpc/sysdev/mpic.c

387

raw_spin_lock(&mpic->fixup_lock);

arch/powerpc/sysdev/mpic.c

390

raw_spin_unlock(&mpic->fixup_lock);

arch/powerpc/sysdev/mpic.c

394

static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,

arch/powerpc/sysdev/mpic.c

397

struct mpic_irq_fixup *fixup = &mpic->fixups[source];

arch/powerpc/sysdev/mpic.c

406

raw_spin_lock_irqsave(&mpic->fixup_lock, flags);

arch/powerpc/sysdev/mpic.c

414

raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags);

arch/powerpc/sysdev/mpic.c

419

mpic->save_data[source].fixup_data = tmp | 1;

arch/powerpc/sysdev/mpic.c

423

static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source)

arch/powerpc/sysdev/mpic.c

425

struct mpic_irq_fixup *fixup = &mpic->fixups[source];

arch/powerpc/sysdev/mpic.c

435

raw_spin_lock_irqsave(&mpic->fixup_lock, flags);

arch/powerpc/sysdev/mpic.c

440

raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags);

arch/powerpc/sysdev/mpic.c

445

mpic->save_data[source].fixup_data = tmp & ~1;

arch/powerpc/sysdev/mpic.c

450

static void __init mpic_scan_ht_msi(struct mpic *mpic, u8 __iomem *devbase,

arch/powerpc/sysdev/mpic.c

486

static void __init mpic_scan_ht_msi(struct mpic *mpic, u8 __iomem *devbase,

arch/powerpc/sysdev/mpic.c

493

static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase,

arch/powerpc/sysdev/mpic.c

529

mpic->fixups[irq].index = i;

arch/powerpc/sysdev/mpic.c

530

mpic->fixups[irq].base = base;

arch/powerpc/sysdev/mpic.c

533

mpic->fixups[irq].applebase = devbase + 0x60;

arch/powerpc/sysdev/mpic.c

535

mpic->fixups[irq].applebase = NULL;

arch/powerpc/sysdev/mpic.c

537

mpic->fixups[irq].data = readl(base + 4) | 0x80000000;

arch/powerpc/sysdev/mpic.c

542

static void __init mpic_scan_ht_pics(struct mpic *mpic)

arch/powerpc/sysdev/mpic.c

550

mpic->fixups = kzalloc_objs(*mpic->fixups, 128);

arch/powerpc/sysdev/mpic.c

551

BUG_ON(mpic->fixups == NULL);

arch/powerpc/sysdev/mpic.c

554

raw_spin_lock_init(&mpic->fixup_lock);

arch/powerpc/sysdev/mpic.c

582

mpic_scan_ht_pic(mpic, devbase, devfn, l);

arch/powerpc/sysdev/mpic.c

583

mpic_scan_ht_msi(mpic, devbase, devfn);

arch/powerpc/sysdev/mpic.c

59

static struct mpic *mpics;

arch/powerpc/sysdev/mpic.c

594

static inline int mpic_is_ht_interrupt(struct mpic *mpic, unsigned int source)

arch/powerpc/sysdev/mpic.c

599

static void __init mpic_scan_ht_pics(struct mpic *mpic)

arch/powerpc/sysdev/mpic.c

60

static struct mpic *mpic_primary;

arch/powerpc/sysdev/mpic.c

606

static struct mpic *mpic_find(unsigned int irq)

arch/powerpc/sysdev/mpic.c

615

static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int src)

arch/powerpc/sysdev/mpic.c

617

return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]);

arch/powerpc/sysdev/mpic.c

621

static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int src)

arch/powerpc/sysdev/mpic.c

623

return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]);

arch/powerpc/sysdev/mpic.c

639

static inline struct mpic * mpic_from_ipi(struct irq_data *d)

arch/powerpc/sysdev/mpic.c

646

static inline struct mpic * mpic_from_irq(unsigned int irq)

arch/powerpc/sysdev/mpic.c

652

static inline struct mpic * mpic_from_irq_data(struct irq_data *d)

arch/powerpc/sysdev/mpic.c

658

static inline void mpic_eoi(struct mpic *mpic)

arch/powerpc/sysdev/mpic.c

671

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

674

DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src);

arch/powerpc/sysdev/mpic.c

692

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

695

DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src);

arch/powerpc/sysdev/mpic.c

713

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

716

DBG("%s: end_irq: %d\n", mpic->name, d->irq);

arch/powerpc/sysdev/mpic.c

723

mpic_eoi(mpic);

arch/powerpc/sysdev/mpic.c

730

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

736

mpic_ht_end_irq(mpic, src);

arch/powerpc/sysdev/mpic.c

741

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

745

mpic_startup_ht_interrupt(mpic, src, irqd_is_level_type(d));

arch/powerpc/sysdev/mpic.c

752

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

755

mpic_shutdown_ht_interrupt(mpic, src);

arch/powerpc/sysdev/mpic.c

761

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

765

DBG("%s: end_irq: %d\n", mpic->name, d->irq);

arch/powerpc/sysdev/mpic.c

773

mpic_ht_end_irq(mpic, src);

arch/powerpc/sysdev/mpic.c

774

mpic_eoi(mpic);

arch/powerpc/sysdev/mpic.c

782

struct mpic *mpic = mpic_from_ipi(d);

arch/powerpc/sysdev/mpic.c

783

unsigned int src = virq_to_hw(d->irq) - mpic->ipi_vecs[0];

arch/powerpc/sysdev/mpic.c

785

DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src);

arch/powerpc/sysdev/mpic.c

796

struct mpic *mpic = mpic_from_ipi(d);

arch/powerpc/sysdev/mpic.c

803

mpic_eoi(mpic);

arch/powerpc/sysdev/mpic.c

810

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

811

unsigned int src = virq_to_hw(d->irq) - mpic->timer_vecs[0];

arch/powerpc/sysdev/mpic.c

813

DBG("%s: enable_tm: %d (tm %d)\n", mpic->name, d->irq, src);

arch/powerpc/sysdev/mpic.c

820

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

821

unsigned int src = virq_to_hw(d->irq) - mpic->timer_vecs[0];

arch/powerpc/sysdev/mpic.c

830

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

833

if (mpic->flags & MPIC_SINGLE_DEST_CPU) {

arch/powerpc/sysdev/mpic.c

849

static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)

arch/powerpc/sysdev/mpic.c

872

struct mpic *mpic = mpic_from_irq_data(d);

arch/powerpc/sysdev/mpic.c

877

mpic, d->irq, src, flow_type);

arch/powerpc/sysdev/mpic.c

879

if (src >= mpic->num_sources)

arch/powerpc/sysdev/mpic.c

915

if (mpic_is_ht_interrupt(mpic, src))

arch/powerpc/sysdev/mpic.c

919

vecpri = mpic_type_to_vecpri(mpic, flow_type);

arch/powerpc/sysdev/mpic.c

932

struct mpic *mpic = mpic_from_irq(virq);

arch/powerpc/sysdev/mpic.c

937

mpic, virq, src, vector);

arch/powerpc/sysdev/mpic.c

939

if (src >= mpic->num_sources)

arch/powerpc/sysdev/mpic.c

950

struct mpic *mpic = mpic_from_irq(virq);

arch/powerpc/sysdev/mpic.c

954

mpic, virq, src, cpuid);

arch/powerpc/sysdev/mpic.c

956

if (src >= mpic->num_sources)

arch/powerpc/sysdev/mpic.h

10

extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);

arch/powerpc/sysdev/mpic.h

11

int __init mpic_msi_init_allocator(struct mpic *mpic);

arch/powerpc/sysdev/mpic.h

12

int __init mpic_u3msi_init(struct mpic *mpic);

arch/powerpc/sysdev/mpic.h

14

static inline void mpic_msi_reserve_hwirq(struct mpic *mpic,

arch/powerpc/sysdev/mpic.h

20

static inline int mpic_u3msi_init(struct mpic *mpic)

arch/powerpc/sysdev/mpic.h

27

int __init mpic_pasemi_msi_init(struct mpic *mpic);

arch/powerpc/sysdev/mpic.h

29

static inline int mpic_pasemi_msi_init(struct mpic *mpic) { return -1; }

arch/powerpc/sysdev/mpic.h

39

extern int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw);

arch/powerpc/sysdev/mpic.h

40

void __init mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum);

arch/powerpc/sysdev/mpic.h

41

int __init mpic_setup_error_int(struct mpic *mpic, int intvec);

arch/powerpc/sysdev/mpic.h

43

static inline int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw)

arch/powerpc/sysdev/mpic.h

49

static inline void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)

arch/powerpc/sysdev/mpic.h

54

static inline int mpic_setup_error_int(struct mpic *mpic, int intvec)

arch/powerpc/sysdev/mpic_msi.c

18

void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)

arch/powerpc/sysdev/mpic_msi.c

21

if (!mpic->msi_bitmap.bitmap)

arch/powerpc/sysdev/mpic_msi.c

24

msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);

arch/powerpc/sysdev/mpic_msi.c

28

static int __init mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)

arch/powerpc/sysdev/mpic_msi.c

31

const struct irq_domain_ops *ops = mpic->irqhost->ops;

arch/powerpc/sysdev/mpic_msi.c

45

msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);

arch/powerpc/sysdev/mpic_msi.c

48

msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);

arch/powerpc/sysdev/mpic_msi.c

51

msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);

arch/powerpc/sysdev/mpic_msi.c

53

for (i = 124; i < mpic->num_sources; i++)

arch/powerpc/sysdev/mpic_msi.c

54

msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);

arch/powerpc/sysdev/mpic_msi.c

63

ops->xlate(mpic->irqhost, NULL, oirq.args,

arch/powerpc/sysdev/mpic_msi.c

65

msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);

arch/powerpc/sysdev/mpic_msi.c

72

static int __init mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)

arch/powerpc/sysdev/mpic_msi.c

78

int __init mpic_msi_init_allocator(struct mpic *mpic)

arch/powerpc/sysdev/mpic_msi.c

82

rc = msi_bitmap_alloc(&mpic->msi_bitmap, mpic->num_sources,

arch/powerpc/sysdev/mpic_msi.c

83

irq_domain_get_of_node(mpic->irqhost));

arch/powerpc/sysdev/mpic_msi.c

87

rc = msi_bitmap_reserve_dt_hwirqs(&mpic->msi_bitmap);

arch/powerpc/sysdev/mpic_msi.c

89

if (mpic->flags & MPIC_U3_HT_IRQS)

arch/powerpc/sysdev/mpic_msi.c

90

rc = mpic_msi_reserve_u3_hwirqs(mpic);

arch/powerpc/sysdev/mpic_msi.c

93

msi_bitmap_free(&mpic->msi_bitmap);

arch/powerpc/sysdev/mpic_u3msi.c

173

int __init mpic_u3msi_init(struct mpic *mpic)

arch/powerpc/sysdev/mpic_u3msi.c

178

rc = mpic_msi_init_allocator(mpic);

arch/powerpc/sysdev/mpic_u3msi.c

18

static struct mpic *msi_mpic;

arch/powerpc/sysdev/mpic_u3msi.c

187

msi_mpic = mpic;

drivers/irqchip/irq-armada-370-xp.c

189

static struct mpic *mpic_data __ro_after_init;

drivers/irqchip/irq-armada-370-xp.c

191

static inline bool mpic_is_ipi_available(struct mpic *mpic)

drivers/irqchip/irq-armada-370-xp.c

199

return mpic->parent_irq <= 0;

drivers/irqchip/irq-armada-370-xp.c

214

struct mpic *mpic = irq_data_get_irq_chip_data(d);

drivers/irqchip/irq-armada-370-xp.c

218

writel(hwirq, mpic->base + MPIC_INT_CLEAR_ENABLE);

drivers/irqchip/irq-armada-370-xp.c

220

writel(hwirq, mpic->per_cpu + MPIC_INT_SET_MASK);

drivers/irqchip/irq-armada-370-xp.c

225

struct mpic *mpic = irq_data_get_irq_chip_data(d);

drivers/irqchip/irq-armada-370-xp.c

229

writel(hwirq, mpic->base + MPIC_INT_SET_ENABLE);

drivers/irqchip/irq-armada-370-xp.c

231

writel(hwirq, mpic->per_cpu + MPIC_INT_CLEAR_MASK);

drivers/irqchip/irq-armada-370-xp.c

239

struct mpic *mpic = irq_data_get_irq_chip_data(d);

drivers/irqchip/irq-armada-370-xp.c

241

msg->address_lo = lower_32_bits(mpic->msi_doorbell_addr);

drivers/irqchip/irq-armada-370-xp.c

242

msg->address_hi = upper_32_bits(mpic->msi_doorbell_addr);

drivers/irqchip/irq-armada-370-xp.c

243

msg->data = BIT(cpu + 8) | (d->hwirq + mpic->msi_doorbell_start);

drivers/irqchip/irq-armada-370-xp.c

272

struct mpic *mpic = domain->host_data;

drivers/irqchip/irq-armada-370-xp.c

275

mutex_lock(&mpic->msi_lock);

drivers/irqchip/irq-armada-370-xp.c

276

hwirq = bitmap_find_free_region(mpic->msi_used, mpic->msi_doorbell_size,

drivers/irqchip/irq-armada-370-xp.c

278

mutex_unlock(&mpic->msi_lock);

drivers/irqchip/irq-armada-370-xp.c

296

struct mpic *mpic = domain->host_data;

drivers/irqchip/irq-armada-370-xp.c

298

mutex_lock(&mpic->msi_lock);

drivers/irqchip/irq-armada-370-xp.c

299

bitmap_release_region(mpic->msi_used, d->hwirq, order_base_2(nr_irqs));

drivers/irqchip/irq-armada-370-xp.c

300

mutex_unlock(&mpic->msi_lock);

drivers/irqchip/irq-armada-370-xp.c

309

static void mpic_msi_reenable_percpu(struct mpic *mpic)

drivers/irqchip/irq-armada-370-xp.c

314

reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK);

drivers/irqchip/irq-armada-370-xp.c

315

reg |= mpic->msi_doorbell_mask;

drivers/irqchip/irq-armada-370-xp.c

316

writel(reg, mpic->per_cpu + MPIC_IN_DRBEL_MASK);

drivers/irqchip/irq-armada-370-xp.c

319

writel(1, mpic->per_cpu + MPIC_INT_CLEAR_MASK);

drivers/irqchip/irq-armada-370-xp.c

337

static int __init mpic_msi_init(struct mpic *mpic, struct device_node *node,

drivers/irqchip/irq-armada-370-xp.c

340

mpic->msi_doorbell_addr = main_int_phys_base + MPIC_SW_TRIG_INT;

drivers/irqchip/irq-armada-370-xp.c

342

mutex_init(&mpic->msi_lock);

drivers/irqchip/irq-armada-370-xp.c

344

if (mpic_is_ipi_available(mpic)) {

drivers/irqchip/irq-armada-370-xp.c

345

mpic->msi_doorbell_start = PCI_MSI_DOORBELL_START;

drivers/irqchip/irq-armada-370-xp.c

346

mpic->msi_doorbell_size = PCI_MSI_DOORBELL_NR;

drivers/irqchip/irq-armada-370-xp.c

347

mpic->msi_doorbell_mask = PCI_MSI_DOORBELL_MASK;

drivers/irqchip/irq-armada-370-xp.c

349

mpic->msi_doorbell_start = PCI_MSI_FULL_DOORBELL_START;

drivers/irqchip/irq-armada-370-xp.c

350

mpic->msi_doorbell_size = PCI_MSI_FULL_DOORBELL_NR;

drivers/irqchip/irq-armada-370-xp.c

351

mpic->msi_doorbell_mask = PCI_MSI_FULL_DOORBELL_MASK;

drivers/irqchip/irq-armada-370-xp.c

357

.host_data = mpic,

drivers/irqchip/irq-armada-370-xp.c

358

.size = mpic->msi_doorbell_size,

drivers/irqchip/irq-armada-370-xp.c

361

mpic->msi_inner_domain = msi_create_parent_irq_domain(&info, &mpic_msi_parent_ops);

drivers/irqchip/irq-armada-370-xp.c

362

if (!mpic->msi_inner_domain)

drivers/irqchip/irq-armada-370-xp.c

365

mpic_msi_reenable_percpu(mpic);

drivers/irqchip/irq-armada-370-xp.c

368

if (!mpic_is_ipi_available(mpic))

drivers/irqchip/irq-armada-370-xp.c

369

writel(0, mpic->per_cpu + MPIC_INT_CLEAR_MASK);

drivers/irqchip/irq-armada-370-xp.c

374

static __maybe_unused void mpic_msi_reenable_percpu(struct mpic *mpic) {}

drivers/irqchip/irq-armada-370-xp.c

376

static inline int mpic_msi_init(struct mpic *mpic, struct device_node *node,

drivers/irqchip/irq-armada-370-xp.c

383

static void mpic_perf_init(struct mpic *mpic)

drivers/irqchip/irq-armada-370-xp.c

397

writel(MPIC_INT_CAUSE_PERF(cpuid), mpic->per_cpu + MPIC_INT_FABRIC_MASK);

drivers/irqchip/irq-armada-370-xp.c

403

struct mpic *mpic = irq_data_get_irq_chip_data(d);

drivers/irqchip/irq-armada-370-xp.c

406

reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK);

drivers/irqchip/irq-armada-370-xp.c

408

writel(reg, mpic->per_cpu + MPIC_IN_DRBEL_MASK);

drivers/irqchip/irq-armada-370-xp.c

413

struct mpic *mpic = irq_data_get_irq_chip_data(d);

drivers/irqchip/irq-armada-370-xp.c

416

reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK);

drivers/irqchip/irq-armada-370-xp.c

418

writel(reg, mpic->per_cpu + MPIC_IN_DRBEL_MASK);

drivers/irqchip/irq-armada-370-xp.c

423

struct mpic *mpic = irq_data_get_irq_chip_data(d);

drivers/irqchip/irq-armada-370-xp.c

438

writel((map << 8) | d->hwirq, mpic->base + MPIC_SW_TRIG_INT);

drivers/irqchip/irq-armada-370-xp.c

443

struct mpic *mpic = irq_data_get_irq_chip_data(d);

drivers/irqchip/irq-armada-370-xp.c

445

writel(~BIT(d->hwirq), mpic->per_cpu + MPIC_IN_DRBEL_CAUSE);

drivers/irqchip/irq-armada-370-xp.c

479

static void mpic_ipi_resume(struct mpic *mpic)

drivers/irqchip/irq-armada-370-xp.c

482

unsigned int virq = irq_find_mapping(mpic->ipi_domain, i);

drivers/irqchip/irq-armada-370-xp.c

488

d = irq_domain_get_irq_data(mpic->ipi_domain, virq);

drivers/irqchip/irq-armada-370-xp.c

493

static int __init mpic_ipi_init(struct mpic *mpic, struct device_node *node)

drivers/irqchip/irq-armada-370-xp.c

497

mpic->ipi_domain = irq_domain_create_linear(of_fwnode_handle(node), IPI_DOORBELL_NR,

drivers/irqchip/irq-armada-370-xp.c

498

&mpic_ipi_domain_ops, mpic);

drivers/irqchip/irq-armada-370-xp.c

499

if (WARN_ON(!mpic->ipi_domain))

drivers/irqchip/irq-armada-370-xp.c

502

irq_domain_update_bus_token(mpic->ipi_domain, DOMAIN_BUS_IPI);

drivers/irqchip/irq-armada-370-xp.c

503

base_ipi = irq_domain_alloc_irqs(mpic->ipi_domain, IPI_DOORBELL_NR, NUMA_NO_NODE, NULL);

drivers/irqchip/irq-armada-370-xp.c

514

struct mpic *mpic = irq_data_get_irq_chip_data(d);

drivers/irqchip/irq-armada-370-xp.c

521

atomic_io_modify(mpic->base + MPIC_INT_SOURCE_CTL(hwirq),

drivers/irqchip/irq-armada-370-xp.c

529

static void mpic_smp_cpu_init(struct mpic *mpic)

drivers/irqchip/irq-armada-370-xp.c

531

for (irq_hw_number_t i = 0; i < mpic->domain->hwirq_max; i++)

drivers/irqchip/irq-armada-370-xp.c

532

writel(i, mpic->per_cpu + MPIC_INT_SET_MASK);

drivers/irqchip/irq-armada-370-xp.c

534

if (!mpic_is_ipi_available(mpic))

drivers/irqchip/irq-armada-370-xp.c

538

writel(0, mpic->per_cpu + MPIC_IN_DRBEL_MASK);

drivers/irqchip/irq-armada-370-xp.c

541

writel(0, mpic->per_cpu + MPIC_IN_DRBEL_CAUSE);

drivers/irqchip/irq-armada-370-xp.c

544

writel(0, mpic->per_cpu + MPIC_INT_CLEAR_MASK);

drivers/irqchip/irq-armada-370-xp.c

547

static void mpic_reenable_percpu(struct mpic *mpic)

drivers/irqchip/irq-armada-370-xp.c

551

unsigned int virq = irq_find_mapping(mpic->domain, i);

drivers/irqchip/irq-armada-370-xp.c

561

if (mpic_is_ipi_available(mpic))

drivers/irqchip/irq-armada-370-xp.c

562

mpic_ipi_resume(mpic);

drivers/irqchip/irq-armada-370-xp.c

564

mpic_msi_reenable_percpu(mpic);

drivers/irqchip/irq-armada-370-xp.c

569

struct mpic *mpic = irq_get_default_domain()->host_data;

drivers/irqchip/irq-armada-370-xp.c

571

mpic_perf_init(mpic);

drivers/irqchip/irq-armada-370-xp.c

572

mpic_smp_cpu_init(mpic);

drivers/irqchip/irq-armada-370-xp.c

573

mpic_reenable_percpu(mpic);

drivers/irqchip/irq-armada-370-xp.c

580

struct mpic *mpic = mpic_data;

drivers/irqchip/irq-armada-370-xp.c

582

mpic_perf_init(mpic);

drivers/irqchip/irq-armada-370-xp.c

583

mpic_reenable_percpu(mpic);

drivers/irqchip/irq-armada-370-xp.c

584

enable_percpu_irq(mpic->parent_irq, IRQ_TYPE_NONE);

drivers/irqchip/irq-armada-370-xp.c

589

static void mpic_smp_cpu_init(struct mpic *mpic) {}

drivers/irqchip/irq-armada-370-xp.c

590

static void mpic_ipi_resume(struct mpic *mpic) {}

drivers/irqchip/irq-armada-370-xp.c

606

struct mpic *mpic = domain->host_data;

drivers/irqchip/irq-armada-370-xp.c

612

irq_set_chip_data(virq, mpic);

drivers/irqchip/irq-armada-370-xp.c

616

writel(hwirq, mpic->per_cpu + MPIC_INT_CLEAR_MASK);

drivers/irqchip/irq-armada-370-xp.c

618

writel(hwirq, mpic->base + MPIC_INT_SET_ENABLE);

drivers/irqchip/irq-armada-370-xp.c

638

static void mpic_handle_msi_irq(struct mpic *mpic)

drivers/irqchip/irq-armada-370-xp.c

643

cause = readl_relaxed(mpic->per_cpu + MPIC_IN_DRBEL_CAUSE);

drivers/irqchip/irq-armada-370-xp.c

644

cause &= mpic->msi_doorbell_mask;

drivers/irqchip/irq-armada-370-xp.c

645

writel(~cause, mpic->per_cpu + MPIC_IN_DRBEL_CAUSE);

drivers/irqchip/irq-armada-370-xp.c

648

generic_handle_domain_irq(mpic->msi_inner_domain, i - mpic->msi_doorbell_start);

drivers/irqchip/irq-armada-370-xp.c

651

static void mpic_handle_msi_irq(struct mpic *mpic) {}

drivers/irqchip/irq-armada-370-xp.c

655

static void mpic_handle_ipi_irq(struct mpic *mpic)

drivers/irqchip/irq-armada-370-xp.c

660

cause = readl_relaxed(mpic->per_cpu + MPIC_IN_DRBEL_CAUSE);

drivers/irqchip/irq-armada-370-xp.c

664

generic_handle_domain_irq(mpic->ipi_domain, i);

drivers/irqchip/irq-armada-370-xp.c

667

static inline void mpic_handle_ipi_irq(struct mpic *mpic) {}

drivers/irqchip/irq-armada-370-xp.c

672

struct mpic *mpic = irq_desc_get_handler_data(desc);

drivers/irqchip/irq-armada-370-xp.c

680

cause = readl_relaxed(mpic->per_cpu + MPIC_PPI_CAUSE);

drivers/irqchip/irq-armada-370-xp.c

684

irqsrc = readl_relaxed(mpic->base + MPIC_INT_SOURCE_CTL(i));

drivers/irqchip/irq-armada-370-xp.c

693

mpic_handle_msi_irq(mpic);

drivers/irqchip/irq-armada-370-xp.c

697

generic_handle_domain_irq(mpic->domain, i);

drivers/irqchip/irq-armada-370-xp.c

705

struct mpic *mpic = irq_get_default_domain()->host_data;

drivers/irqchip/irq-armada-370-xp.c

710

irqstat = readl_relaxed(mpic->per_cpu + MPIC_CPU_INTACK);

drivers/irqchip/irq-armada-370-xp.c

717

generic_handle_domain_irq(mpic->domain, i);

drivers/irqchip/irq-armada-370-xp.c

721

mpic_handle_msi_irq(mpic);

drivers/irqchip/irq-armada-370-xp.c

725

mpic_handle_ipi_irq(mpic);

drivers/irqchip/irq-armada-370-xp.c

731

struct mpic *mpic = mpic_data;

drivers/irqchip/irq-armada-370-xp.c

733

mpic->doorbell_mask = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK);

drivers/irqchip/irq-armada-370-xp.c

740

struct mpic *mpic = mpic_data;

drivers/irqchip/irq-armada-370-xp.c

744

for (irq_hw_number_t i = 0; i < mpic->domain->hwirq_max; i++) {

drivers/irqchip/irq-armada-370-xp.c

745

unsigned int virq = irq_find_mapping(mpic->domain, i);

drivers/irqchip/irq-armada-370-xp.c

755

writel(i, mpic->per_cpu + MPIC_INT_CLEAR_MASK);

drivers/irqchip/irq-armada-370-xp.c

760

writel(i, mpic->base + MPIC_INT_SET_ENABLE);

drivers/irqchip/irq-armada-370-xp.c

772

writel(mpic->doorbell_mask, mpic->per_cpu + MPIC_IN_DRBEL_MASK);

drivers/irqchip/irq-armada-370-xp.c

774

if (mpic_is_ipi_available(mpic)) {

drivers/irqchip/irq-armada-370-xp.c

775

src0 = mpic->doorbell_mask & IPI_DOORBELL_MASK;

drivers/irqchip/irq-armada-370-xp.c

776

src1 = mpic->doorbell_mask & PCI_MSI_DOORBELL_MASK;

drivers/irqchip/irq-armada-370-xp.c

778

src0 = mpic->doorbell_mask & PCI_MSI_FULL_DOORBELL_SRC0_MASK;

drivers/irqchip/irq-armada-370-xp.c

779

src1 = mpic->doorbell_mask & PCI_MSI_FULL_DOORBELL_SRC1_MASK;

drivers/irqchip/irq-armada-370-xp.c

783

writel(0, mpic->per_cpu + MPIC_INT_CLEAR_MASK);

drivers/irqchip/irq-armada-370-xp.c

785

writel(1, mpic->per_cpu + MPIC_INT_CLEAR_MASK);

drivers/irqchip/irq-armada-370-xp.c

787

if (mpic_is_ipi_available(mpic))

drivers/irqchip/irq-armada-370-xp.c

788

mpic_ipi_resume(mpic);

drivers/irqchip/irq-armada-370-xp.c

835

struct mpic *mpic;

drivers/irqchip/irq-armada-370-xp.c

838

mpic = kzalloc_obj(*mpic);

drivers/irqchip/irq-armada-370-xp.c

839

if (WARN_ON(!mpic))

drivers/irqchip/irq-armada-370-xp.c

842

mpic_data = mpic;

drivers/irqchip/irq-armada-370-xp.c

844

err = mpic_map_region(node, 0, &mpic->base, &phys_base);

drivers/irqchip/irq-armada-370-xp.c

848

err = mpic_map_region(node, 1, &mpic->per_cpu, NULL);

drivers/irqchip/irq-armada-370-xp.c

852

nr_irqs = FIELD_GET(MPIC_INT_CONTROL_NUMINT_MASK, readl(mpic->base + MPIC_INT_CONTROL));

drivers/irqchip/irq-armada-370-xp.c

855

writel(i, mpic->base + MPIC_INT_CLEAR_ENABLE);

drivers/irqchip/irq-armada-370-xp.c

861

mpic->parent_irq = irq_of_parse_and_map(node, 0);

drivers/irqchip/irq-armada-370-xp.c

867

if (!mpic_is_ipi_available(mpic))

drivers/irqchip/irq-armada-370-xp.c

870

mpic->domain = irq_domain_create_linear(of_fwnode_handle(node), nr_irqs, &mpic_irq_ops, mpic);

drivers/irqchip/irq-armada-370-xp.c

871

if (!mpic->domain) {

drivers/irqchip/irq-armada-370-xp.c

876

irq_domain_update_bus_token(mpic->domain, DOMAIN_BUS_WIRED);

drivers/irqchip/irq-armada-370-xp.c

879

mpic_perf_init(mpic);

drivers/irqchip/irq-armada-370-xp.c

880

mpic_smp_cpu_init(mpic);

drivers/irqchip/irq-armada-370-xp.c

882

err = mpic_msi_init(mpic, node, phys_base);

drivers/irqchip/irq-armada-370-xp.c

888

if (mpic_is_ipi_available(mpic)) {

drivers/irqchip/irq-armada-370-xp.c

889

irq_set_default_domain(mpic->domain);

drivers/irqchip/irq-armada-370-xp.c

892

err = mpic_ipi_init(mpic, node);

drivers/irqchip/irq-armada-370-xp.c

908

irq_set_chained_handler_and_data(mpic->parent_irq,

drivers/irqchip/irq-armada-370-xp.c

909

mpic_handle_cascade_irq, mpic);