mmwrite
mmwrite(stat, MANTIS_INT_STAT);
mmwrite(rst_stat, MANTIS_GPIF_STATUS);
mmwrite(mmread(MANTIS_INT_MASK) & ~MANTIS_INT_IRQ1,
mmwrite(0xda, MANTIS_PCMCIA_RESET); /* Leading edge assert */
mmwrite(0x00, MANTIS_PCMCIA_RESET); /* Trailing edge deassert */
mmwrite(mmread(MANTIS_INT_MASK) & ~MANTIS_INT_IRQ1,
mmwrite(stat, MANTIS_INT_STAT);
mmwrite(rst_stat, MANTIS_GPIF_STATUS);
mmwrite(mmread(MANTIS_INT_MASK) & ~mask, MANTIS_INT_MASK);
mmwrite(mmread(MANTIS_INT_MASK) | mask, MANTIS_INT_MASK);
mmwrite(0, MANTIS_DMA_CTL);
mmwrite(mantis->risc_dma, MANTIS_RISC_START);
mmwrite(mmread(MANTIS_GPIF_ADDR) | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
mmwrite(0, MANTIS_DMA_CTL);
mmwrite(MANTIS_FIFO_EN | MANTIS_DCAP_EN
mmwrite((mmread(MANTIS_GPIF_ADDR) & (~(MANTIS_GPIF_HIFRDWRN))), MANTIS_GPIF_ADDR);
mmwrite((mmread(MANTIS_DMA_CTL) & ~(MANTIS_FIFO_EN |
mmwrite(mmread(MANTIS_INT_STAT), MANTIS_INT_STAT);
mmwrite(0xdada0000, MANTIS_CARD_RESET);
mmwrite(0xdada0000, MANTIS_CARD_RESET);
mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
mmwrite(hif_addr, MANTIS_GPIF_ADDR);
mmwrite(data, MANTIS_GPIF_DOUT);
mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
mmwrite(1, MANTIS_GPIF_BRBYTES);
mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
mmwrite(hif_addr, MANTIS_GPIF_ADDR);
mmwrite(data, MANTIS_GPIF_DOUT);
mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
mmwrite(count, MANTIS_GPIF_BRBYTES);
mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
mmwrite(txd, MANTIS_I2CDATA_CTL);
mmwrite(intstat, MANTIS_INT_STAT);
mmwrite(MANTIS_INT_I2CDONE, MANTIS_INT_STAT);
mmwrite(rxd, MANTIS_I2CDATA_CTL);
mmwrite(MANTIS_INT_I2CDONE, MANTIS_INT_STAT);
mmwrite(txd, MANTIS_I2CDATA_CTL);
mmwrite(reg, MANTIS_CONTROL);
mmwrite(reg, MANTIS_CONTROL);
mmwrite(mantis->gpio_status, MANTIS_GPIF_ADDR);
mmwrite(0x00, MANTIS_GPIF_DOUT);
mmwrite(reg, MANTIS_CONTROL);
mmwrite(reg, MANTIS_CONTROL);
mmwrite(mmread(MANTIS_GPIF_STATUS) & (~MANTIS_CARD_PLUGOUT | ~MANTIS_CARD_PLUGIN), MANTIS_GPIF_STATUS);
mmwrite(0xda000000, MANTIS_CARD_RESET);
mmwrite(gpif_irqcfg, MANTIS_GPIF_IRQCFG);
mmwrite(0x00da0000, MANTIS_CARD_RESET);
mmwrite(gpif_irqcfg, MANTIS_GPIF_IRQCFG);
mmwrite(card_stat | MANTIS_MASK_PLUGOUT, MANTIS_GPIF_IRQCFG);
mmwrite(card_stat | MANTIS_MASK_PLUGIN, MANTIS_GPIF_IRQCFG);
mmwrite((mmread(MANTIS_UART_CTL) | (params->parity & 0x3)), MANTIS_UART_CTL);
mmwrite(reg, MANTIS_UART_BAUD);
mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
mmwrite((mmread(MANTIS_UART_BAUD) | (config->bytes << 8)), MANTIS_UART_BAUD);
mmwrite((mmread(MANTIS_UART_CTL) | MANTIS_UART_RXFLUSH), MANTIS_UART_CTL);
mmwrite(mmread(MANTIS_UART_CTL) | MANTIS_UART_RXINT, MANTIS_UART_CTL);
mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
mmwrite(0x00, MANTIS_GPIF_DOUT);