Symbol: mmMP0_SMN_C2PMSG_64
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
111
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
117
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
90
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
96
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
299
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
312
psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
356
psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
375
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
382
psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
414
offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64);
drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c
118
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);
drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c
125
psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c
49
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,
drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c
55
psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.c
99
psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
166
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
169
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
186
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
196
psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
226
offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64);
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
171
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET);
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
174
psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
183
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET);
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
186
psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
241
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
248
psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
265
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
278
psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
317
offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64);