arch/mips/kernel/branch.c

71

mm_pool32axf_op) {

arch/mips/kernel/process.c

209

ip->r_format.func == mm_pool32axf_op &&

arch/mips/kernel/process.c

340

ip->r_format.func != mm_pool32axf_op)

arch/mips/mm/uasm-micromips.c

113

[insn_sync] = {M(mm_pool32a_op, 0, 0, 0, mm_sync_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

114

[insn_tlbp] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbp_op, mm_pool32axf_op), 0},

arch/mips/mm/uasm-micromips.c

115

[insn_tlbr] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbr_op, mm_pool32axf_op), 0},

arch/mips/mm/uasm-micromips.c

116

[insn_tlbwi] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbwi_op, mm_pool32axf_op), 0},

arch/mips/mm/uasm-micromips.c

117

[insn_tlbwr] = {M(mm_pool32a_op, 0, 0, 0, mm_tlbwr_op, mm_pool32axf_op), 0},

arch/mips/mm/uasm-micromips.c

118

[insn_wait] = {M(mm_pool32a_op, 0, 0, 0, mm_wait_op, mm_pool32axf_op), SCIMM},

arch/mips/mm/uasm-micromips.c

119

[insn_wsbh] = {M(mm_pool32a_op, 0, 0, 0, mm_wsbh_op, mm_pool32axf_op), RT | RS},

arch/mips/mm/uasm-micromips.c

124

[insn_syscall] = {M(mm_pool32a_op, 0, 0, 0, mm_syscall_op, mm_pool32axf_op), SCIMM},

arch/mips/mm/uasm-micromips.c

61

[insn_di] = {M(mm_pool32a_op, 0, 0, 0, mm_di_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

62

[insn_divu] = {M(mm_pool32a_op, 0, 0, 0, mm_divu_op, mm_pool32axf_op), RT | RS},

arch/mips/mm/uasm-micromips.c

73

[insn_eret] = {M(mm_pool32a_op, 0, 0, 0, mm_eret_op, mm_pool32axf_op), 0},

arch/mips/mm/uasm-micromips.c

78

[insn_jalr] = {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RT | RS},

arch/mips/mm/uasm-micromips.c

79

[insn_jr] = {M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

87

[insn_mfc0] = {M(mm_pool32a_op, 0, 0, 0, mm_mfc0_op, mm_pool32axf_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

88

[insn_mfhi] = {M(mm_pool32a_op, 0, 0, 0, mm_mfhi32_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

89

[insn_mflo] = {M(mm_pool32a_op, 0, 0, 0, mm_mflo32_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

90

[insn_mtc0] = {M(mm_pool32a_op, 0, 0, 0, mm_mtc0_op, mm_pool32axf_op), RT | RS | RD},

arch/mips/mm/uasm-micromips.c

91

[insn_mthi] = {M(mm_pool32a_op, 0, 0, 0, mm_mthi32_op, mm_pool32axf_op), RS},

arch/mips/mm/uasm-micromips.c

92

[insn_mtlo] = {M(mm_pool32a_op, 0, 0, 0, mm_mtlo32_op, mm_pool32axf_op), RS},