drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

179

tmp = RREG32(mmVCE_UENC_REG_CLOCK_GATING);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

181

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

305

WREG32_P(mmVCE_UENC_REG_CLOCK_GATING, 0x3F, ~0x3F);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

486

tmp = RREG32(mmVCE_UENC_REG_CLOCK_GATING);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

488

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

499

tmp = RREG32(mmVCE_UENC_REG_CLOCK_GATING);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

501

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

174

WREG32_P(mmVCE_UENC_REG_CLOCK_GATING, 0x3F, ~0x3F);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

329

tmp = RREG32(mmVCE_UENC_REG_CLOCK_GATING);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

331

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

345

tmp = RREG32(mmVCE_UENC_REG_CLOCK_GATING);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

347

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

377

orig = tmp = RREG32(mmVCE_UENC_REG_CLOCK_GATING);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

380

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

383

WREG32(mmVCE_UENC_REG_CLOCK_GATING, 0x00);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

197

data = RREG32(mmVCE_UENC_REG_CLOCK_GATING);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

199

WREG32(mmVCE_UENC_REG_CLOCK_GATING, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

221

data = RREG32(mmVCE_UENC_REG_CLOCK_GATING);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

223

WREG32(mmVCE_UENC_REG_CLOCK_GATING, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

560

WREG32_P(mmVCE_UENC_REG_CLOCK_GATING, 0x3F, ~0x3F);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

642

WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_REG_CLOCK_GATING), 0x3F, ~0x3F);