mmUVD_RB_BASE_LO2
WREG32(mmUVD_RB_BASE_LO2, ring->gpu_addr);
WREG32_SOC15(UVD, k, mmUVD_RB_BASE_LO2, ring->gpu_addr);
WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr);
WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr);
SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO2),
WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr);
WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr);
SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO2),
WREG32_SOC15(VCN, i, mmUVD_RB_BASE_LO2, ring->gpu_addr);
WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_LO2, ring->gpu_addr);
SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO2),
WREG32_SOC15(VCN, i, mmUVD_RB_BASE_LO2, ring->gpu_addr);
WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_LO2, ring->gpu_addr);
SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO2),