drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

871

WREG32(mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1120

WREG32_SOC15(UVD, k, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

925

MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_RB_BASE_LO), ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1328

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

57

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO),

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

999

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1158

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1329

WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

2056

SOC15_REG_OFFSET(UVD, 0, mmUVD_RB_BASE_LO),

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

66

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1324

WREG32_SOC15(VCN, i, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1499

SOC15_REG_OFFSET(VCN, i, mmUVD_RB_BASE_LO),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1692

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

69

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO),

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1362

WREG32_SOC15(VCN, i, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1499

mmUVD_RB_BASE_LO),

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1756

WREG32_SOC15(VCN, inst_idx, mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

73

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_RB_BASE_LO),