drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

328

WREG32_P(mmUVD_POWER_STATUS, 0, ~(1 << 2));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1489

WREG32(mmUVD_POWER_STATUS, UVD_POWER_STATUS__UVD_PG_EN_MASK);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

735

WREG32_P(mmUVD_POWER_STATUS, 0, ~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

966

WREG32_P(SOC15_REG_OFFSET(UVD, k, mmUVD_POWER_STATUS), 0,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1033

tmp = RREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1036

WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1244

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1261

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1266

WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_POWER_STATUS), 0,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1314

ret_code = SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1343

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1369

ret_code = SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1375

reg_data2 = RREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1377

WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, reg_data2);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1403

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

2017

adev->vcn.ip_dump[inst_off] = RREG32_SOC15(VCN, i, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

49

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

783

data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

788

WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

798

data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

801

WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1188

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1201

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1205

WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_POWER_STATUS), 0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1307

ret_code = SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1322

WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1351

WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1354

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

58

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

801

data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

807

WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

820

data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

823

WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

864

tmp = RREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

867

WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

961

WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

990

WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1009

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS), 1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1012

tmp = RREG32_SOC15(VCN, inst_idx, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1015

WREG32_SOC15(VCN, inst_idx, mmUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1116

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1145

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1176

WREG32_P(SOC15_REG_OFFSET(VCN, i, mmUVD_POWER_STATUS), 0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1549

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1562

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1566

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS), 0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1636

WREG32_P(SOC15_REG_OFFSET(VCN, i, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1668

ret_code = SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1684

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1710

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1713

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1719

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

60

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

61

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1038

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS), 1,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1041

tmp = RREG32_SOC15(VCN, inst_idx, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1044

WREG32_SOC15(VCN, inst_idx, mmUVD_POWER_STATUS, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1147

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1182

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1604

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1617

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1621

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS), 0,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1731

ret_code = SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 0x1,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1745

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1779

WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1782

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

65

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_POWER_STATUS),

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

715

data = RREG32_SOC15(VCN, inst, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

721

WREG32_SOC15(VCN, inst, mmUVD_POWER_STATUS, data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

732

data = RREG32_SOC15(VCN, inst, mmUVD_POWER_STATUS);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

735

WREG32_SOC15(VCN, inst, mmUVD_POWER_STATUS, data);