mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH
WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,
MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH),
WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,
WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,
mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH),
WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,
UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH),
mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH),
WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,
VCN, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH),
mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH),
WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH,
VCN, inst_idx, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH),