drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

372

WREG32_P(mmUVD_LMI_CTRL2, 0, ~(1 << 8));

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

477

WREG32_P(mmUVD_LMI_CTRL2, 1 << 8, ~(1 << 8));

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

335

WREG32_P(mmUVD_LMI_CTRL2, 0, ~(1 << 8));

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

440

WREG32_P(mmUVD_LMI_CTRL2, 1 << 8, ~(1 << 8));

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

340

WREG32_P(mmUVD_LMI_CTRL2, 1 << 8, ~(1 << 8));

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

382

WREG32_P(mmUVD_LMI_CTRL2, 0, ~(1 << 8));

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

466

WREG32_P(mmUVD_LMI_CTRL2, 1 << 8, ~(1 << 8));

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

477

WREG32_P(mmUVD_LMI_CTRL2, 0, ~(1 << 8));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

899

WREG32_P(mmUVD_LMI_CTRL2, 1 << 8, ~(1 << 8));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

910

WREG32_P(mmUVD_LMI_CTRL2, 0, ~(1 << 8));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1040

WREG32_P(SOC15_REG_OFFSET(UVD, k, mmUVD_LMI_CTRL2), 0,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1152

WREG32_P(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_CTRL2),

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1166

WREG32_P(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_CTRL2), 0,

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

876

MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_CTRL2),

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

933

MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_LMI_CTRL2),

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

989

WREG32_P(SOC15_REG_OFFSET(UVD, k, mmUVD_LMI_CTRL2),

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1097

WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_LMI_CTRL2,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1199

WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_CTRL2),

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

913

WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_CTRL2), 0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1074

WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_CTRL2), 0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1243

tmp = RREG32_SOC15(VCN, 0, mmUVD_LMI_CTRL2);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1245

WREG32_SOC15(VCN, 0, mmUVD_LMI_CTRL2, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

935

UVD, 0, mmUVD_LMI_CTRL2),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1079

VCN, 0, mmUVD_LMI_CTRL2), 0, 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1241

WREG32_P(SOC15_REG_OFFSET(VCN, i, mmUVD_LMI_CTRL2), 0,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1606

tmp = RREG32_SOC15(VCN, i, mmUVD_LMI_CTRL2);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1608

WREG32_SOC15(VCN, i, mmUVD_LMI_CTRL2, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1108

VCN, inst_idx, mmUVD_LMI_CTRL2), 0, 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1230

WREG32_P(SOC15_REG_OFFSET(VCN, i, mmUVD_LMI_CTRL2), 0,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1661

tmp = RREG32_SOC15(VCN, i, mmUVD_LMI_CTRL2);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1663

WREG32_SOC15(VCN, i, mmUVD_LMI_CTRL2, tmp);