drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

158

return RREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

172

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

542

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

547

ring->wptr = RREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

369

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

372

ring->wptr = RREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

39

SOC15_REG_ENTRY_STR(JPEG, 0, mmUVD_JRBC_RB_WPTR),

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

435

return RREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

453

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

373

WREG32_SOC15(JPEG, i, mmUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

376

ring->wptr = RREG32_SOC15(JPEG, i, mmUVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

43

SOC15_REG_ENTRY_STR(JPEG, 0, mmUVD_JRBC_RB_WPTR),

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

463

return RREG32_SOC15(JPEG, ring->me, mmUVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

481

WREG32_SOC15(JPEG, ring->me, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

389

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

392

ring->wptr = RREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

41

SOC15_REG_ENTRY_STR(JPEG, 0, mmUVD_JRBC_RB_WPTR),

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

454

return RREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

472

WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1255

tmp = RREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_WPTR);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1397

WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_WPTR, ring->wptr);