drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

1017

case mmUVD_GPCOM_VCPU_CMD:

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

121

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

128

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

488

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

495

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

503

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

510

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1073

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1088

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1105

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

936

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

943

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1198

PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_CMD), 0));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1208

PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_CMD), 0));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1380

PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_CMD), 0));

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

1399

PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_CMD), 0));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1516

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1532

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1563

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1573

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1626

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1657

PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0));

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

177

SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

55

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_GPCOM_VCPU_CMD),

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

194

adev->vcn.inst->external.cmd = SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

64

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_GPCOM_VCPU_CMD),

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

331

adev->vcn.inst[j].external.cmd = SOC15_REG_OFFSET(VCN, j, mmUVD_GPCOM_VCPU_CMD);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

67

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_GPCOM_VCPU_CMD),

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

223

adev->vcn.inst[i].external.cmd = SOC15_REG_OFFSET(VCN, i, mmUVD_GPCOM_VCPU_CMD);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

71

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_GPCOM_VCPU_CMD),