drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1307

reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) &

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1321

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1322

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1350

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1362

reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) &

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1381

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1382

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1410

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

81

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_DPG_PAUSE)

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1303

reg_data = RREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE) &

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1314

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1317

SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1361

WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

90

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_DPG_PAUSE)

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1664

reg_data = RREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE) &

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1676

WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1679

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1718

WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

93

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_DPG_PAUSE)

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1727

reg_data = RREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE) &

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1737

WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1740

SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_DPG_PAUSE,

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1788

WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_PAUSE, reg_data);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

97

SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_DPG_PAUSE)